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Tetsuo Tada: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tetsuo Tada
    Opportunities with the open architecture test system. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:343- [Conf]
  2. Masaki Hashizume, Daisuke Yoneda, Hiroyuki Yotsuyanagi, Tetsuo Tada, Takeshi Koyama, Ikuro Morita, Takeomi Tamesada
    I_DDQ Test Method Based on Wavelet Transformation for Noisy Current Measurement Environment. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2004, pp:112-117 [Conf]
  3. Yoshihiro Nagura, Michael Mullins, Anthony Sauvageau, Yoshinoro Fujiwara, Katsuya Furue, Ryuji Ohmura, Tatsunori Komoike, Takenori Okitaka, Tetsushi Tanizaki, Katsumi Dosaka, Kazutami Arimoto, Yukiyoshi Koda, Tetsuo Tada
    Test cost reduction by at-speed BISR for embedded DRAMs. [Citation Graph (0, 0)][DBLP]
    ITC, 2001, pp:182-187 [Conf]
  4. Narumi Sakashita, Fumihiro Okuda, Ken'ichi Shimomura, Hiroki Shimano, Mitsuhiro Hamada, Tetsuo Tada, Shinji Komori, Kazuo Kyuma, Akihiko Yasuoka, Haruhiko Abe
    A Built-In Self-Test Circuit with Timing Margin Test Function in a 1Gbit Synchronous DRAM. [Citation Graph (0, 0)][DBLP]
    ITC, 1996, pp:319-324 [Conf]

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