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Dongkun Shin :
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Dongkun Shin , Jihong Kim Dynamic voltage scaling of periodic and aperiodic tasks in priority-driven systems. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2004, pp:653-658 [Conf ] Dongkun Shin , Jihong Kim Optimizing intra-task voltage scheduling using data flow analysis. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2005, pp:703-708 [Conf ] Dongkun Shin , Jihong Kim Power-aware communication optimization for networks-on-chips with voltage scalable links. [Citation Graph (0, 0)][DBLP ] CODES+ISSS, 2004, pp:170-175 [Conf ] Dongkun Shin , Jihong Kim , Seongsoo Lee Low-Energy Intra-Task Voltage Scheduling Using Static Timing Analysis. [Citation Graph (0, 0)][DBLP ] DAC, 2001, pp:438-443 [Conf ] Dongkun Shin , Jihong Kim , Naehyuck Chang An operation rearrangement technique for power optimization in VLIM instruction fetch. [Citation Graph (0, 0)][DBLP ] DATE, 2001, pp:809- [Conf ] Dongkun Shin , Jihong Kim Power-Aware Scheduling of Mixed Task Sets in Priority-Driven Systems. [Citation Graph (0, 0)][DBLP ] EUC, 2004, pp:227-237 [Conf ] Hyojun Kim , Jihyun In , DongHoon Ham , SongHo Yoon , Dongkun Shin Virtual-ROM: A New Demand Paging Component for RTOS and NAND Flash Memory Based Mobile Devices. [Citation Graph (0, 0)][DBLP ] ISCIS, 2006, pp:677-686 [Conf ] Dongkun Shin , Jihong Kim A profile-based energy-efficient intra-task voltage scheduling algorithm for real-time applications. [Citation Graph (0, 0)][DBLP ] ISLPED, 2001, pp:271-274 [Conf ] Dongkun Shin , Jihong Kim Power-aware scheduling of conditional task graphs in real-time multiprocessor systems. [Citation Graph (0, 0)][DBLP ] ISLPED, 2003, pp:408-413 [Conf ] Dongkun Shin , Woonseok Kim , Jaekwon Jeon , Jihong Kim , Sang Lyul Min SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms. [Citation Graph (0, 0)][DBLP ] PACS, 2002, pp:141-156 [Conf ] Woonseok Kim , Dongkun Shin , Han-Saem Yun , Jihong Kim , Sang Lyul Min Performance Comparison of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems. [Citation Graph (0, 0)][DBLP ] IEEE Real Time Technology and Applications Symposium, 2002, pp:219-228 [Conf ] Dongkun Shin , Jihong Kim , Seongsoo Lee Intra-Task Voltage Scheduling for Low-Energy, Hard Real-Time Applications. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2001, v:18, n:2, pp:20-30 [Journal ] Dongkun Shin , Hojun Shim , Yongsoo Joo , Han-Saem Yun , Jihong Kim , Naehyuck Chang Energy-Monitoring Tool for Low-Power Embedded Programs. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:4, pp:7-17 [Journal ] Dongkun Shin , Jihong Kim Intra-task voltage scheduling on DVS-enabled hard real-time systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:10, pp:1530-1549 [Journal ] Dongkun Shin , Jihong Kim Dynamic voltage scaling of mixed task sets in priority-driven systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:3, pp:438-453 [Journal ] Woonseok Kim , Dongkun Shin , Han-Saem Yun , Jihong Kim , Sang Lyul Min Performance Evaluation of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems. [Citation Graph (0, 0)][DBLP ] J. Low Power Electronics, 2005, v:1, n:3, pp:207-216 [Journal ] Dongkun Shin , Jihong Kim Communication Power Optimization for Network-on-Chip Architectures. [Citation Graph (0, 0)][DBLP ] J. Low Power Electronics, 2006, v:2, n:2, pp:165-176 [Journal ] Locality and Duplication-Aware Garbage Collection for Flash Memory-Based Virtual Memory Systems. [Citation Graph (, )][DBLP ] KAST: K-associative sector translation for NAND flash memory in real-time systems. [Citation Graph (, )][DBLP ] Storage architecture and software support for SLC/MLC combined flash memory. [Citation Graph (, )][DBLP ] Connectivity-based clustering with stretching technique in MANETs. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.003secs