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Title:
Author:
Anantha Chandrakasan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Paul-Peter Sotiriadis, Anantha Chandrakasan
    Reducing bus delay in submicron technology using coding. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:109-114 [Conf]
  2. James Goodman, Anantha Chandrakasan
    An Energy Efficient Reconfigurable Public-Key Cryptograhpy Processor Architecture. [Citation Graph (0, 0)][DBLP]
    CHES, 2000, pp:175-190 [Conf]
  3. Anantha Chandrakasan, Isabel Yang, Carlin Vieri, Dimitri Antoniadis
    Design Considerations and Tools for Low-voltage Digital System Design. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:113-118 [Conf]
  4. James Goodman, Anantha Chandrakasan, Abram P. Dancy
    Design and Implementation of a Scalable Encryption Processor with Embedded Variable DC/DC Converter. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:855-860 [Conf]
  5. James Kao, Anantha Chandrakasan, Dimitri Antoniadis
    Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:409-414 [Conf]
  6. James Kao, Siva Narendra, Anantha Chandrakasan
    MTCMOS Hierarchical Sizing Based on Mutual Exclusive Discharge Patterns. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:495-500 [Conf]
  7. Gangadhar Konduri, Anantha Chandrakasan
    A Framework for Collaborative and Distributed Web-Based Design. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:898-903 [Conf]
  8. Vikas Mehrotra, Shiou Lin Sam, Duane S. Boning, Anantha Chandrakasan, Rakesh Vallishayee, Sani R. Nassif
    A methodology for modeling the effects of systematic within-die interconnect and device variation on circuit performance. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:172-175 [Conf]
  9. Miodrag Potkonjak, Mani B. Srivastava, Anantha Chandrakasan
    Efficient Substitution of Multiple Constant Multiplications by Shifts and Additions Using Iterative Pairwise Matching. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:189-194 [Conf]
  10. Amit Sinha, Anantha Chandrakasan
    JouleTrack - A Web Based Tool for Software Energy Profiling. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:220-225 [Conf]
  11. Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha Chandrakasan
    Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:415-420 [Conf]
  12. Twan Basten, Luca Benini, Anantha Chandrakasan, Menno Lindwer, Jie Liu, Rex Min, Feng Zhao
    Scaling into Ambient Intelligence. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10076-10083 [Conf]
  13. Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha Chandrakasan, Wim Dehaene
    Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:196-201 [Conf]
  14. Raúl Blázquez, Fred Lee, David D. Wentzloff, Brian P. Ginsburg, Johnna Powell, Anantha Chandrakasan
    Direct Conversion Pulsed UWB Transceiver Architecture. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:94-95 [Conf]
  15. Frank Honoré, Benton H. Calhoun, Anantha Chandrakasan
    Power-aware architectures and circuits for FPGA-based signal processing. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:244- [Conf]
  16. Shamik Das, Anantha Chandrakasan, Rafael Reif
    Timing, energy, and thermal performance of three-dimensional integrated circuits. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:338-343 [Conf]
  17. Wendi Rabiner Heinzelman, Anantha Chandrakasan, Hari Balakrishnan
    Energy-Efficient Communication Protocol for Wireless Microsensor Networks. [Citation Graph (0, 0)][DBLP]
    HICSS, 2000, pp:- [Conf]
  18. Anantha Chandrakasan, Miodrag Potkonjak, Jan M. Rabaey, Robert W. Brodersen
    HYPER-LP: a system for power minimization using architectural transformations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:300-303 [Conf]
  19. James Kao, Siva Narendra, Anantha Chandrakasan
    Subthreshold leakage modeling and reduction techniques. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2002, pp:141-148 [Conf]
  20. Amit Sinha, Anantha Chandrakasan
    Energy Efficient Real-Time Scheduling. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:458-470 [Conf]
  21. Paul-Peter Sotiriadis, Anantha Chandrakasan
    Bus Energy Minimization by Transition Pattern Coding (TPC) in Deep Submicron Technologies. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2000, pp:322-327 [Conf]
  22. Hemang Lavana, Franc Brglez, Robert B. Reese, Gangadhar Konduri, Anantha Chandrakasan
    OpenDesign: An Open User-Configurable Project Environment for Collaborative Design and Execution on the Internet. [Citation Graph (0, 0)][DBLP]
    ICCD, 2000, pp:567-570 [Conf]
  23. Miodrag Potkonjak, Anantha Chandrakasan
    Synthesis and selection of DCT algorithms using behavioral synthesis-based algorithm space exploration. [Citation Graph (0, 0)][DBLP]
    ICIP, 1995, pp:65-68 [Conf]
  24. Manish Bhardwaj, Anantha Chandrakasan
    Bounding the Lifetime of Sensor Networks Via Optimal Role Assignments. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 2002, pp:- [Conf]
  25. Gangadhar Konduri, James Goodman, Anantha Chandrakasan
    Energy efficient software through dynamic voltage scheduling. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:358-361 [Conf]
  26. Paul-Peter Sotiriadis, Anantha Chandrakasan, Vahid Tarokh
    Maximum achievable energy reduction using coding with applications to deep sub-micron buses. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:85-88 [Conf]
  27. Jim Burr, Anantha Chandrakasan, Fari Assaderaghi, Francky Catthoor, Frank Fox, Dave Greenhill, Deo Singh, Jim Sproch
    Low power design without compromise (panel). [Citation Graph (0, 0)][DBLP]
    ISLPED, 1997, pp:293-294 [Conf]
  28. Rajeevan Amirtharajah, Thucydides Xanthopoulos, Anantha Chandrakasan
    Power scalable processing using distributed arithmetic. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1999, pp:170-175 [Conf]
  29. Benton H. Calhoun, Anantha Chandrakasan
    Characterizing and modeling minimum energy operation for subthreshold circuits. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2004, pp:90-95 [Conf]
  30. Benton H. Calhoun, Frank Honoré, Anantha Chandrakasan
    Design methodology for fine-grained leakage control in MTCMOS. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:104-109 [Conf]
  31. Anantha Chandrakasan, Vadim Gutnik, Thucydides Xanthopoulos
    Data driven signal processing: an approach for energy efficient computing. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:347-352 [Conf]
  32. Abram P. Dancy, Anantha Chandrakasan
    A reconfigurable dual output low power digital PWM power converter. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1998, pp:191-196 [Conf]
  33. Scott Meninger, Jose Oscar Mur-Miranda, Rajeevan Amirtharajah, Anantha Chandrakasan, Jeffrey Lang
    Vibration-to-electric energy conversion. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1999, pp:48-53 [Conf]
  34. Rex Min, Anantha Chandrakasan
    A framework for energy-scalable communication in high-density wireless networks. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:36-41 [Conf]
  35. Siva Narendra, Vivek De, Dimitri Antoniadis, Anantha Chandrakasan, Shekhar Borkar
    Scaling of stack effect and its application for leakage reduction. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:195-200 [Conf]
  36. Siva Narendra, Vivek De, Shekhar Borkar, Dimitri Antoniadis, Anantha Chandrakasan
    Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:19-23 [Conf]
  37. Amit Sinha, Alice Wang, Anantha Chandrakasan
    Algorithmic transforms for efficient energy scalable computation. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2000, pp:31-36 [Conf]
  38. Paul-Peter Sotiriadis, Theodoros Konstantakopoulos, Anantha Chandrakasan
    Analysis and implementation of charge recycling for deep sub-micron buses. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:364-369 [Conf]
  39. Alice Wang, Anantha Chandrakasan
    Energy-aware architectures for a real-valued FFT implementation. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:360-365 [Conf]
  40. Andrew Wang, Seong-Hwan Cho, Charles Sodini, Anantha Chandrakasan
    Energy efficient Modulation and MAC for Asymmetric RF Microsensor Systems. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:106-111 [Conf]
  41. Benton H. Calhoun, Alice Wang, Naveen Verma, Anantha Chandrakasan
    Sub-threshold design: the challenges of minimizing circuit energy. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:366-368 [Conf]
  42. Nigel Drego, Anantha Chandrakasan, Duane S. Boning
    A Test-Structure to Efficiently Study Threshold-Voltage Variation in Large MOSFET Arrays. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:281-286 [Conf]
  43. Shamik Das, Anantha Chandrakasan, Rafael Reif
    Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2003, pp:13-18 [Conf]
  44. Alice Wang, Anantha Chandrakasan, Stephen V. Kosonocky
    Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2002, pp:7-14 [Conf]
  45. Amit Sinha, Anantha Chandrakasan
    Operating System and Algorithmic Techniques for Energy Scalable Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    Mobile Data Management, 2001, pp:199-209 [Conf]
  46. Eugene Shih, Seong-Hwan Cho, Nathan Ickes, Rex Min, Amit Sinha, Alice Wang, Anantha Chandrakasan
    Physical layer driven protocol and algorithm design for energy-efficient wireless sensor networks. [Citation Graph (0, 0)][DBLP]
    MOBICOM, 2001, pp:272-287 [Conf]
  47. Arifur Rahman, Shamik Das, Anantha Chandrakasan, Rafael Reif
    Wiring requirement and three-dimensional integration of field-programmable gate arrays. [Citation Graph (0, 0)][DBLP]
    SLIP, 2001, pp:107-113 [Conf]
  48. Anantha Chandrakasan, Abram P. Dancy, James Goodman, Thomas Simon
    A Low-Power Wireless Camera System. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:32-36 [Conf]
  49. Anantha Chandrakasan
    Ultra low power digital signal processing. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:352-357 [Conf]
  50. Anantha Chandrakasan, Kurt Keutzer, A. Khandekar, S. L. Maskara, B. D. Pradhan, Mani B. Srivastava
    Mobile Communications: Demands on VLSI Technology, Design and CAD. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:432-436 [Conf]
  51. Anantha Chandrakasan, Mani B. Srivastava, Robert W. Brodersen
    Energy Efficient Programmable Computation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1994, pp:261-264 [Conf]
  52. Rex Min, Manish Bhardwaj, Seong-Hwan Cho, Eugene Shih, Amit Sinha, Alice Wang, Anantha Chandrakasan
    Low-Power Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:205-210 [Conf]
  53. Debashis Saha, Anantha Chandrakasan
    Web-based Distributed VLSI Design. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1998, pp:449-0 [Conf]
  54. Amit Sinha, Anantha Chandrakasan
    Energy Aware Software. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:50-0 [Conf]
  55. Amit Sinha, Anantha Chandrakasan
    Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:221-226 [Conf]
  56. David D. Wentzloff, Benton H. Calhoun, Rex Min, Alice Wang, Nathan Ickes, Anantha Chandrakasan
    Design Considerations for Next Generation Wireless Power-Aware Microsensor Nodes. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:361-0 [Conf]
  57. Debashis Saha, Anantha Chandrakasan
    A Framework for Distributed Web-based Microsystem Design. [Citation Graph (0, 0)][DBLP]
    WETICE, 1997, pp:69-74 [Conf]
  58. Amit Sinha, Anantha Chandrakasan
    Dynamic Power Management in Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:2, pp:62-74 [Journal]
  59. Paul-Peter Sotiriadis, Anantha Chandrakasan
    Power Estimation and Power Optimal Communication in Deep Submicron Buses: Analytical Models and Statistical Measures. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2002, v:11, n:6, pp:637-658 [Journal]
  60. Rex Min, Anantha Chandrakasan
    MobiCom poster: top five myths about the energy consumption of wireless communication. [Citation Graph (0, 0)][DBLP]
    Mobile Computing and Communications Review, 2003, v:7, n:1, pp:65-67 [Journal]
  61. Paul-Peter Sotiriadis, Vahid Tarokh, Anantha Chandrakasan
    Energy reduction in VLSI computation modules: an information-theoretic approach. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Information Theory, 2003, v:49, n:4, pp:790-808 [Journal]
  62. Shamik Das, Anantha Chandrakasan, Rafael Reif
    Calibration of Rent's rule models for three-dimensional integrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:4, pp:359-366 [Journal]
  63. James Goodman, Anantha Chandrakasan
    Low power scalable encryption for wireless systems. [Citation Graph (0, 0)][DBLP]
    Wireless Networks, 1998, v:4, n:1, pp:55-70 [Journal]
  64. George Hadjiyiannis, Anantha Chandrakasan, Srinivas Devadas
    A low power, low bandwidth protocol for remote wireless terminals. [Citation Graph (0, 0)][DBLP]
    Wireless Networks, 1998, v:4, n:1, pp:3-15 [Journal]
  65. Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha Chandrakasan, Wim Dehaene
    Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  66. Raúl Blázquez, Fred Lee, David D. Wentzloff, Brian P. Ginsburg, Johnna Powell, Anantha Chandrakasan
    Direct Conversion Pulsed UWB Transceiver Architecture [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  67. Anantha Chandrakasan, Edwin Hsing-Mean Sha
    Special Section on Low-Power Electronics and Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:4, pp:518-519 [Journal]
  68. Scott Meninger, Jose Oscar Mur-Miranda, Rajeevan Amirtharajah, Anantha Chandrakasan, J. H. Lang
    Vibration-to-electric energy conversion. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2001, v:9, n:1, pp:64-76 [Journal]
  69. Amit Sinha, Alice Wang, Anantha Chandrakasan
    Energy scalable system design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:135-145 [Journal]

  70. Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis. [Citation Graph (, )][DBLP]


  71. Non-linear Operating Point Statistical Analysis for Local Variations in logic timing at low voltage. [Citation Graph (, )][DBLP]


  72. Breaking the simulation barrier: SRAM evaluation through norm minimization. [Citation Graph (, )][DBLP]


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