The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

J. P. Tual: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. J. P. Tual, M. Thill, C. Bernard, Huy Nam Nguyen, F. Mottini, M. Moreau, P. Vallet
    Auriga2: a 4.7 million-transistor CISC microprocessor. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1995, pp:- [Conf]
  2. Marc Renaudin, G. Fraidy Bouesse, Ph. Proust, J. P. Tual, Laurent Sourgen, Fabien Germain
    High Security Smartcards. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:228-233 [Conf]
  3. Huy Nam Nguyen, J. P. Tual, L. Ducousso, M. Thill, P. Vallet
    Logic Synthesis and Verification of the CPU and Caches of a Mainframe System. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:60-64 [Conf]
  4. Huy Nam Nguyen, J. P. Tual, L. Ducousso, M. Thill, P. Vallet
    The Structured Logic CAD Suite Used on the DPS7000 System. [Citation Graph (0, 0)][DBLP]
    ICCD, 1994, pp:464-467 [Conf]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002