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Seongmoon Wang :
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Seongmoon Wang , Srimat T. Chakradhar , Kedarnath J. Balakrishnan Re-configurable embedded core test protocol. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2004, pp:234-237 [Conf ] Mango Chia-Tso Chao , Kwang-Ting Cheng , Seongmoon Wang , Srimat T. Chakradhar , Wen-Long Wei Unknown-tolerance analysis and test-quality control for test response compaction using space compactors. [Citation Graph (0, 0)][DBLP ] DAC, 2006, pp:1083-1088 [Conf ] Seongmoon Wang , Sandeep K. Gupta ATPG for Heat Dissipation Minimization During Scan Testing. [Citation Graph (0, 0)][DBLP ] DAC, 1997, pp:614-619 [Conf ] Mango Chia-Tso Chao , Seongmoon Wang , Srimat T. Chakradhar , Wenlong Wei , Kwang-Ting Cheng Coverage loss by using space compactors in presence of unknown values. [Citation Graph (0, 0)][DBLP ] DATE, 2006, pp:1053-1054 [Conf ] Seongmoon Wang , Kedarnath J. Balakrishnan , Srimat T. Chakradhar Efficient unknown blocking using LFSR reseeding. [Citation Graph (0, 0)][DBLP ] DATE, 2006, pp:1051-1052 [Conf ] Seongmoon Wang , Xiao Liu , Srimat T. Chakradhar Hybrid Delay Scan: A Low Hardware Overhead Scan-Based Delay Test Technique for High Fault Coverage and Compact Test Sets. [Citation Graph (0, 0)][DBLP ] DATE, 2004, pp:1296-1301 [Conf ] Mango Chia-Tso Chao , Seongmoon Wang , Srimat T. Chakradhar , Kwang-Ting Cheng Response shaper: a novel technique to enhance unknown tolerance for output response compaction. [Citation Graph (0, 0)][DBLP ] ICCAD, 2005, pp:80-87 [Conf ] Mango Chia-Tso Chao , Seongmoon Wang , Srimat T. Chakradhar , Kwang-Ting Cheng ChiYun Compact: A Novel Test Compaction Technique for Responses with Unknown Values. [Citation Graph (0, 0)][DBLP ] ICCD, 2005, pp:147-152 [Conf ] Seongmoon Wang , Sandeep K. Gupta LT-RTPG: a new test-per-scan BIST TPG for low heat dissipation. [Citation Graph (0, 0)][DBLP ] ITC, 1999, pp:85-94 [Conf ] Seongmoon Wang Generation of Low Power Dissipation and High Fault Coverage Patterns for Scan-Based BIST. [Citation Graph (0, 0)][DBLP ] ITC, 2002, pp:834-843 [Conf ] Seongmoon Wang , Srimat T. Chakradhar A Scalable Scan-Path Test Point Insertion Technique to Enhance Delay Fault Coverage for Standard Scan Designs. [Citation Graph (0, 0)][DBLP ] ITC, 2003, pp:574-583 [Conf ] Seongmoon Wang , Sandeep K. Gupta ATPG for Heat Dissipation Minimization During Test Application. [Citation Graph (0, 0)][DBLP ] ITC, 1994, pp:250-258 [Conf ] Seongmoon Wang , Sandeep K. Gupta DS-LFSR: A New BIST TPG for Low Heat Dissipation. [Citation Graph (0, 0)][DBLP ] ITC, 1997, pp:848-857 [Conf ] Kedarnath J. Balakrishnan , Seongmoon Wang , Srimat T. Chakradhar PIDISC: Pattern Independent Design Independent Seed Compression Technique. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2006, pp:811-817 [Conf ] Wei Li , Seongmoon Wang , Srimat T. Chakradhar , Sudhakar M. Reddy Distance Restricted Scan Chain Reordering to Enhance Delay Fault Coverage. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2005, pp:471-478 [Conf ] Rajamani Sethuram , Seongmoon Wang , Srimat T. Chakradhar , Michael L. Bushnell Zero Cost Test Point Insertion Technique for Structured ASICs. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2007, pp:357-363 [Conf ] Seongmoon Wang , Sandeep K. Gupta ATPG for Heat Dissipation Minimization During Test Application. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1998, v:47, n:2, pp:256-262 [Journal ] Seongmoon Wang , Srimat T. Chakradhar A scalable scan-path test point insertion technique to enhance delay fault coverage for standard scan designs. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:8, pp:1555-1564 [Journal ] Seongmoon Wang , Sandeep K. Gupta DS-LFSR: a BIST TPG for low switching activity. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:7, pp:842-851 [Journal ] Seongmoon Wang , Sandeep K. Gupta An automatic test pattern generator for minimizing switching activity during scan testing activity. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:8, pp:954-968 [Journal ] Seongmoon Wang , S. K. Gupta LT-RTPG: a new test-per-scan BIST TPG for low switching activity. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:8, pp:1565-1574 [Journal ] Seongmoon Wang , Wenlong Wei , Srimat T. Chakradhar Unknown blocking scheme for low control data volume and high observability. [Citation Graph (0, 0)][DBLP ] DATE, 2007, pp:33-38 [Conf ] Zhanglei Wang , Krishnendu Chakrabarty , Seongmoon Wang SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling. [Citation Graph (0, 0)][DBLP ] DATE, 2007, pp:201-206 [Conf ] Seongmoon Wang A BIST TPG for Low Power Dissipation and High Fault Coverage. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2007, v:15, n:7, pp:777-789 [Journal ] A Technique to Reduce Peak Current and Average Power Dissipation in Scan Designs by Limited Capture. [Citation Graph (, )][DBLP ] Machine learning-based volume diagnosis. [Citation Graph (, )][DBLP ] A self-diagnosis technique using Reed-Solomon codes for self-repairing chips. [Citation Graph (, )][DBLP ] A hybrid scheme for compacting test responses with unknown values. [Citation Graph (, )][DBLP ] Search in 0.019secs, Finished in 0.021secs