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Baosheng Wang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Baosheng Wang, Josh Yang, Yuejian Wu, André Ivanov
    A retention-aware test power model for embedded SRAM. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:1180-1183 [Conf]
  2. Baosheng Wang, Yong B. Cho, Sassan Tabatabaei, André Ivanov
    Yield, Overall Test Environment Timing Accuracy, and Defect Level Trade-Offs for High-Speed Interconnect Device Testing. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2003, pp:348-353 [Conf]
  3. Baosheng Wang, Yuejian Wu, André Ivanov
    A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:852-857 [Conf]
  4. Cristian Grecu, Partha Pratim Pande, Baosheng Wang, André Ivanov, Res Saleh
    Methodologies and Algorithms for Testing Switch-Based NoC Interconnects. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:238-246 [Conf]
  5. Baosheng Wang, Yuejian Wu, André Ivanov
    Designs for Reducing Test Time of Distributed Small Embedded SRAMs. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:120-128 [Conf]
  6. Baosheng Wang, Xicheng Lu
    Design and Implementation of Control-Extensible Router. [Citation Graph (0, 0)][DBLP]
    ICCNMC, 2005, pp:762-771 [Conf]
  7. Yaping Liu, Zhenghu Gong, Baosheng Wang, Jinshu Shu
    A Routing Optimization Algorithm for BGP Egress Selection. [Citation Graph (0, 0)][DBLP]
    ICDCIT, 2006, pp:192-199 [Conf]
  8. Dongsheng Li, Xicheng Lu, Baosheng Wang, JinShu Su, Jiannong Cao, Keith C. C. Chan, Hong Va Leong
    Delay-Bounded Range Queries in DHT-based Peer-to-Peer Systems. [Citation Graph (0, 0)][DBLP]
    ICDCS, 2006, pp:64- [Conf]
  9. Baosheng Wang, Josh Yang, André Ivanov
    Reducing Test Time of Embedded SRAMs. [Citation Graph (0, 0)][DBLP]
    MTDT, 2003, pp:47-52 [Conf]
  10. Josh Yang, Baosheng Wang, André Ivanov
    Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:493-498 [Conf]
  11. Baosheng Wang, Yuejian Wu, Josh Yang, André Ivanov, Yervant Zorian
    SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms. [Citation Graph (0, 0)][DBLP]
    VTS, 2005, pp:66-71 [Conf]
  12. Baosheng Wang, Josh Yang, James Cicalo, André Ivanov, Yervant Zorian
    Reducing Embedded SRAM Test Time under Redundancy Constraints. [Citation Graph (0, 0)][DBLP]
    VTS, 2004, pp:237-242 [Conf]
  13. Josh Yang, Baosheng Wang, Yuejian Wu, André Ivanov
    Fast detection of data retention faults and other SRAM cell open defects. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:1, pp:167-180 [Journal]
  14. Qiang Xu, Baosheng Wang, F. Y. Young
    Retention-Aware Test Scheduling for BISTed Embedded SRAMs. [Citation Graph (0, 0)][DBLP]
    European Test Symposium, 2006, pp:83-88 [Conf]
  15. Baosheng Wang, Yuejian Wu, André Ivanov
    A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  16. Baosheng Wang, Andy Kuo, Touraj Farahmand, André Ivanov, Yong B. Cho, Sassan Tabatabaei
    A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2005, v:21, n:6, pp:621-630 [Journal]

  17. Detection Network Anomalies Based on Packet and Flow Analysis. [Citation Graph (, )][DBLP]


  18. Route recovery in vertex-disjoint multipath routing for many-to-one sensor networks. [Citation Graph (, )][DBLP]


  19. Evaluating Internal BGP Networks from the Data Plane. [Citation Graph (, )][DBLP]


  20. Optimizing Network Configurations Based on Potential Profit Loss. [Citation Graph (, )][DBLP]


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