The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Markus Wedler: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Markus Wedler, Dominik Stoffel, Wolfgang Kunz
    Exploiting state encoding for invariant generation in induction-based property checking. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:424-429 [Conf]
  2. Markus Wedler, Dominik Stoffel, Wolfgang Kunz
    Normalization at the arithmetic bit level. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:457-462 [Conf]
  3. Markus Wedler, Dominik Stoffel, Wolfgang Kunz
    Using RTL Statespace Information and State Encoding for Induction Based Property Checking. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11156-11157 [Conf]
  4. Markus Wedler, Dominik Stoffel, Wolfgang Kunz
    Arithmetic Reasoning in DPLL-Based SAT Solving. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:30-35 [Conf]
  5. Minh D. Nguyen, Dominik Stoffel, Markus Wedler, Wolfgang Kunz
    Transition-by-transition FSM traversal for reachability analysis in bounded model checking. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:1068-1075 [Conf]
  6. Markus Wedler, Dominik Stoffel, Wolfgang Kunz
    Improving Structural FSM Traversal by Constraint-Satisfying Logic Simulation. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2002, pp:151-158 [Conf]
  7. Dominik Stoffel, Markus Wedler, Peter Warkentin, Wolfgang Kunz
    Structural FSM traversal. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:5, pp:598-619 [Journal]

  8. Verifying full-custom multipliers by Boolean equivalence checking and an arithmetic bit level proof. [Citation Graph (, )][DBLP]


  9. An Algebraic Approach for Proving Data Correctness in Arithmetic Data Paths. [Citation Graph (, )][DBLP]


  10. Analyzing k-step induction to compute invariants for SAT-based property checking. [Citation Graph (, )][DBLP]


  11. Modeling of Custom-Designed Arithmetic Components for ABL Normalization. [Citation Graph (, )][DBLP]


  12. Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002