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Jihua Chen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Zhihui Xiong, Jihua Chen, Sikun Li
    Hardware/software partitioning for platform-based design method. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:691-696 [Conf]
  2. Zhihui Xiong, Sikun Li, Jihua Chen
    Hardware/software co-design using hierarchical platform-based design method. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:1309-1312 [Conf]
  3. Zhide Zeng, Jihua Chen, Hefeng Cao
    Research and Implementation of a High Speed Test Generation for Ultra Large Scale Combinational Circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1999, pp:70-74 [Conf]
  4. Zhide Zeng, Jihua Chen, Pengxia Liu
    A Fault Partitioning Method in Parallel Test Generation for Large Scale VLSI Circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1999, pp:133-0 [Conf]
  5. Zhihui Xiong, Sikun Li, Jihua Chen, Maojun Zhang
    Hardware/Software Co-design Environment for Hierarchical Platform-Based Design. [Citation Graph (0, 0)][DBLP]
    CSCWD (Selected papers), 2004, pp:242-251 [Conf]
  6. Zhihui Xiong, Sikun Li, Jihua Chen, Maojun Zhang
    Use Dynamic Combination of Two Meta-heuristics to Do Bi-partitioning. [Citation Graph (0, 0)][DBLP]
    ICESS, 2004, pp:216-221 [Conf]

  7. An On-Line Control Flow Checking Method for VLIW Processor. [Citation Graph (, )][DBLP]


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