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Publications of Author

1. Masakazu Yamashina, Masato Motomura
   Reconfigurable computing: its concept and a practical embodiment using newly developed dynamically reconfigurable logic (DRL) LSI: invited talk. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2000, pp:329-332 [Conf]
   
2. Masato Motomura, Yoshiharu Aimoto, Atsufkni Shibayama, Yoshikazu Yabe, Masakazu Yamashina
   An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration. [Citation Graph (0, 0)][DBLP]
   FCCM, 1998, pp:264-266 [Conf]
   
3. Yuichiro Shibata, Masaki Uno, Hideharu Amano, K. Furuta, Taro Fujii, Masato Motomura
   A Virtual Hardware System on a Dynamically Reconfigurable Logic Device. [Citation Graph (0, 0)][DBLP]
   FCCM, 2000, pp:295-296 [Conf]
   
4. Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki, Naoto Kaneko, Yutaka Yamada, Katsuaki Deguchi, Yohei Hasegawa, Hideharu Amano, Kenichiro Anjo, Masato Motomura, Kazutoshi Wakabayashi, Takeo Toi, Toru Awashima
   Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor. [Citation Graph (0, 0)][DBLP]
   FCCM, 2004, pp:328-329 [Conf]
   
5. Lars Friebe, Yoshikazu Yabe, Masato Motomura
   A Study of Channeled DRAM Memory Architectures. [Citation Graph (0, 0)][DBLP]
   ICCD, 2000, pp:261-266 [Conf]
   
6. Mahmoud Meribout, Masato Motomura
   A New Hardware Algorithm for Fast IP Routing Targeting Programmable Routers. [Citation Graph (0, 0)][DBLP]
   Net-Con, 2003, pp:164-179 [Conf]
   
7. Mahmoud Meribout, Masato Motomura
   A New Reconfigurable Hardware Architecture for High Throughput Networking Applications and its Design Methodology. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2003, pp:182- [Conf]
   
8. Mahmoud Meribout, Masato Motomura
   New design methodology with efficient prediction of quality metrics for logic level design towards dynamic reconfigurable logic. [Citation Graph (0, 0)][DBLP]
   Journal of Systems Architecture, 2003, v:48, n:8-10, pp:285-310 [Journal]
   
9. Mahmoud Meribout, Masato Motomura
   A Combined Approach to High-Level Synthesis for Dynamically Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2004, v:53, n:12, pp:1508-1522 [Journal]
   
10. Mahmoud Meribout, Masato Motomura
    Efficient metrics and high-level synthesis for dynamically reconfigurable logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:6, pp:603-621 [Journal]