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Lan-Rong Dung: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hsueh-Chih Yang, Lan-Rong Dung
    On multiple-voltage high-level synthesis using algorithmic transformations. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:872-876 [Conf]
  2. Teng-Hung Chang, Lan-Rong Dung, Jwin-Yen Guo
    On reducing leakage quantization noise of multistage Sigma-Delta modulator using nonlinear oscillation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2555-2558 [Conf]
  3. Hsien-Wen Cheng, Lan-Rong Dung
    A power-aware ME architecture using subsample algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2004, pp:821-824 [Conf]
  4. Tsung-Hsi Chiang, Lan-Rong Dung, Ming-Feng Yaung
    Modeling and formal verification of dataflow graph in system-level design using Petri net. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:5674-5677 [Conf]
  5. Wen-Zen Shen, Yi-Hsin Tao, Lan-Rong Dung
    On the Reduction of Recorder Buffer Size for Discrete Fourier Transform Processor Design. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:171-174 [Conf]
  6. Jieh-Hwang Yen, Lan-Rong Dung, Chi-Yuan Shen
    Design of power-aware multiplier with graceful quality-power trade-offs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1642-1645 [Conf]
  7. Shiuh-Rong Huang, Lan-Rong Dung
    VLSI Implementation for MAC-Level DWT Architecture. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2002, pp:101-106 [Conf]
  8. Hsien-Wen Cheng, Lan-Rong Dung
    EFBLA: A Two-Phase Matching Algorithm for Fast Motion Estimation. [Citation Graph (0, 0)][DBLP]
    IEEE Pacific Rim Conference on Multimedia, 2002, pp:112-119 [Conf]
  9. Lan-Rong Dung, Vijay K. Madisetti
    Conceptual Prototyping of Scalable Embedded DSP Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1996, v:13, n:3, pp:54-65 [Journal]
  10. Teng-Hung Chang, Lan-Rong Dung
    Dynamic Range Improvement of Multistage Multibit Modulator for Low Oversampling Ratios. [Citation Graph (0, 0)][DBLP]
    IEICE Transactions, 2005, v:88, n:2, pp:451-460 [Journal]
  11. Hsien-Wen Cheng, Lan-Rong Dung
    A Power-Aware Motion Estimation Architecture Using Content-based Subsampling. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 2006, v:22, n:4, pp:799-818 [Journal]
  12. Tsung-Hsi Chiang, Lan-Rong Dung
    System-level verification on high-level synthesis of dataflow graph. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  13. Tsung-Hsi Chiang, Lan-Rong Dung
    Verification method of dataflow algorithms in high-level synthesis. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 2007, v:80, n:8, pp:1256-1270 [Journal]

  14. A Subsample-based Motion Estimation for Quality-Stationary Video Coding. [Citation Graph (, )][DBLP]

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