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Barry Shackleford: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Mitsuhiro Yasuda, Katsuhiko Seo, Hisao Koizumi, Barry Shackleford, Fumio Suzuki
    A Top-down Hardware/Software Co-Simulation Method for Embedded Systems Based Upon a Component Logical Bus Architecture. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:169-175 [Conf]
  2. Barry Shackleford, Mitsuhiro Yasuda, Etsuko Okushi, Hisao Koizumi, Hiroyuki Tomiyama, Hiroto Yasuura
    Memory-CPU Size Optimization for Embedded System Designs. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:246-251 [Conf]
  3. Barry Shackleford, Motoo Tanaka, Richard J. Carter, Greg Snider
    High-Performance Cellular Automata Random Number Generators for Embedded Probabilistic Computing Systems. [Citation Graph (0, 0)][DBLP]
    Evolvable Hardware, 2002, pp:191-200 [Conf]
  4. Barry Shackleford, Motoo Tanaka, Richard J. Carter, Greg Snider
    FPGA implementation of neighborhood-of-four cellular automata random number generators. [Citation Graph (0, 0)][DBLP]
    FPGA, 2002, pp:106-112 [Conf]
  5. Barry Shackleford, Etsuko Okushi, Mitsuhiro Yasuda, Hisao Koizumi, Katsuhiko Seo, Takashi Iwamoto, Hiroto Yasuura
    An FPGA-based genetic algorithm machine (poster abstract). [Citation Graph (0, 0)][DBLP]
    FPGA, 2000, pp:218- [Conf]
  6. Greg Snider, Barry Shackleford, Richard J. Carter
    Attacking the semantic gap between application programming languages and configurable hardware. [Citation Graph (0, 0)][DBLP]
    FPGA, 2001, pp:115-124 [Conf]
  7. Barry Shackleford, Greg Snider, Richard J. Carter, Etsuko Okushi, Mitsuhiro Yasuda, Katsuhiko Seo, Hiroto Yasuura
    A High-Performance, Pipelined, FPGA-Based Genetic Algorithm Machine. [Citation Graph (0, 0)][DBLP]
    Genetic Programming and Evolvable Machines, 2001, v:2, n:1, pp:33-60 [Journal]

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