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Yi-Ping You: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yi-Ping You, Chun-Yen Tseng, Yu-Hui Huang, Po-Chiun Huang, TingTing Hwang, Sheng-Yu Hsu
    Low-power techniques for network security processors. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:355-360 [Conf]
  2. Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee
    A sink-n-hoist framework for leakage power reduction. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:124-133 [Conf]
  3. Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee, Wei-Kuan Shih, TingTing Hwang
    Power-Aware Scheduling for Parallel Security Processors with Analytical Models. [Citation Graph (0, 0)][DBLP]
    LCPC, 2004, pp:470-484 [Conf]
  4. Yi-Ping You, Chingren Lee, Jenq Kuen Lee
    Compiler Analysis and Supports for Leakage Power Reduction on Microprocessors. [Citation Graph (0, 0)][DBLP]
    LCPC, 2002, pp:45-60 [Conf]
  5. Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Yu Hung, Yi-Ping You, Ya-Chiao Moo, Sheng-Yuan Chen, Jenq Kuen Lee
    Compiler Supports and Optimizations for PAC VLIW DSP Processors. [Citation Graph (0, 0)][DBLP]
    LCPC, 2005, pp:466-474 [Conf]
  6. Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu, Wen-Li Shih, Shih-Chang Chen, Chung-Kai Chen, Chien-Ching Huang, Yi-Ping You, Jenq Kuen Lee
    Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors. [Citation Graph (0, 0)][DBLP]
    RTCSA, 2006, pp:215-222 [Conf]
  7. Yi-Ping You, Chingren Lee, Jenq Kuen Lee
    Compilers for leakage power reduction. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:1, pp:147-164 [Journal]
  8. Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Young-Jia Lin, Yi-Ping You, Chia-Han Lu, Jenq Kuen Lee
    Enabling compiler flow for embedded VLIW DSP processors with distributed register files. [Citation Graph (0, 0)][DBLP]
    LCTES, 2007, pp:146-148 [Conf]
  9. Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee
    Compilation for compact power-gating controls. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]

  10. PALF: compiler supports for irregular register files in clustered VLIW DSP processors. [Citation Graph (, )][DBLP]


  11. LC-GRFA: global register file assignment with local consciousness for VLIW DSP processors with non-uniform register files. [Citation Graph (, )][DBLP]


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