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Chiu-sing Choy: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-fat Chan, Kong-Pang Pun
    A low power asynchronous Java processor for contactless smart card. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:553-554 [Conf]
  2. Wang Tung Cheng, Kong-Pang Pun, Cheong-fat Chan, Chiu-sing Choy
    An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:1140-1143 [Conf]
  3. Wei Han, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun
    A speech recognizer with selectable model parameters. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:5842-5845 [Conf]
  4. Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Tan Lee, Chiu-sing Choy, Kong-Pang Pun, Pak-Chung Ching
    An HMM-based speech recognition IC. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2003, pp:744-747 [Conf]
  5. Pak-Keung Leung, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun
    A low power asynchronous GF(2/sup 173/) ALU for elliptic curve crypto-processor. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:337-340 [Conf]
  6. Chi-Leung San, Chiu-sing Choy, Pak-Kee Chan, Cheong-fat Chan, Kong-Pang Pun
    Realization of card-centric framework: a card-centric computer [smart cards]. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2005, pp:4999-5002 [Conf]
  7. Pui-Tak So, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun
    Ramp voltage supply using adiabatic charging principle. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2152-2155 [Conf]
  8. W. K. Yeung, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun
    Clock recovery circuit with adiabatic technology (quasi-static CMOS logic). [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2003, pp:185-187 [Conf]
  9. Pui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-fat Chan
    A low power asynchronous DES. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:538-541 [Conf]
  10. Chi-Wai Lee, Chiu-sing Choy, Jan Butas, Cheong-fat Chan
    A pipelined dataflow small micro-coded asynchronous processor and its application to DCT. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:910-913 [Conf]
  11. Wing-Kin Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun
    An asynchronous SOVA decoder for wireless communication application. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:517-520 [Conf]
  12. Kin-Pui Ho, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun
    A CMOS current feedback operational amplifier with active current mode compensation. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:709-712 [Conf]
  13. Hongwei Wang, Cheong-fat Chan, Chiu-sing Choy
    A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:137-140 [Conf]
  14. Kong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan, José E. Franca
    A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:221-224 [Conf]
  15. Jing-ling Yang, Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun
    A high-efficiency strongly self-checking asynchronous datapath. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:10, pp:1484-1494 [Journal]

  16. Low-power H.264/AVC baseline decoder for portable applications. [Citation Graph (, )][DBLP]

  17. Low-Cost VC Allocator Design for Virtual Channel Wormhole Routers in Networks-on-Chip. [Citation Graph (, )][DBLP]

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for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002