The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Joseph A. Fisher: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Joseph A. Fisher, Stefan M. Freudenberger
    Predicting Conditional Branch Directions From Previous Runs of a Program. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1992, pp:85-95 [Conf]
  2. Joseph A. Fisher
    Moving from embedded systems to embedded computing. [Citation Graph (0, 0)][DBLP]
    CASES, 2003, pp:1- [Conf]
  3. Joseph A. Fisher
    A New Architecture for Supercomputing. [Citation Graph (0, 0)][DBLP]
    COMPCON, 1987, pp:177-180 [Conf]
  4. Joseph A. Fisher, John J. O'Donnell
    VLIW Machines: Multiprocessors We Can Acutally Program. [Citation Graph (0, 0)][DBLP]
    COMPCON, 1984, pp:299-305 [Conf]
  5. Joseph A. Fisher
    Customized Instruction-Sets for Embedded Processors. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:253-257 [Conf]
  6. Paolo Faraboschi, Geoffrey Brown, Joseph A. Fisher, Giuseppe Desoli, Fred Homewood
    Lx: a technology platform for customizable VLIW embedded processing. [Citation Graph (0, 0)][DBLP]
    ISCA, 2000, pp:203-213 [Conf]
  7. Joseph A. Fisher
    Very Long Instruction Word Architectures and the ELI-512 [Citation Graph (0, 0)][DBLP]
    ISCA, 1983, pp:140-150 [Conf]
  8. Joseph A. Fisher
    Retrospective: Very Long Instruction Word Architectures and the ELI-512. [Citation Graph (0, 0)][DBLP]
    25 Years ISCA: Retrospectives and Reprints, 1998, pp:34-36 [Conf]
  9. Joseph A. Fisher
    Very Long Instruction Word Architectures and the ELI-512. [Citation Graph (0, 0)][DBLP]
    25 Years ISCA: Retrospectives and Reprints, 1998, pp:263-273 [Conf]
  10. Giuseppe Desoli, Nikolay Mateev, Evelyn Duesterwald, Paolo Faraboschi, Joseph A. Fisher
    DELI: a new run-time control point. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:257-268 [Conf]
  11. Joseph A. Fisher, Paolo Faraboschi, Giuseppe Desoli
    Custom-fit Processors: Letting Applications Define Architectures. [Citation Graph (0, 0)][DBLP]
    MICRO, 1996, pp:324-335 [Conf]
  12. Joseph A. Fisher, John R. Ellis, John C. Ruttenberg, Alexandru Nicolau
    Parallel processing: a smart compiler and a dumb machine (with retrospective) [Citation Graph (0, 0)][DBLP]
    Best of PLDI, 1984, pp:112-124 [Conf]
  13. Joseph A. Fisher, John R. Ellis, John C. Ruttenberg, Alexandru Nicolau
    Parallel processing: a smart compiler and a dumb machine. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Symposium on Compiler Construction, 1984, pp:37-47 [Conf]
  14. Joseph A. Fisher
    Walk-Time Techniques: Catalyst for Architectural Change. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:9, pp:40-42 [Journal]
  15. Joseph A. Fisher
    Trace Scheduling: A Technique for Global Microcode Compaction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:7, pp:478-490 [Journal]
  16. Alexandru Nicolau, Joseph A. Fisher
    Measuring the Parallelism Available for Very Long Instruction Word Architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:11, pp:968-976 [Journal]

  17. Microcode compaction: looking backward and looking forward. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002