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Publications of Author

1. Mihai Budiu, Girish Venkataramani, Tiberiu Chelcea, Seth Copen Goldstein
   Spatial computation. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 2004, pp:14-26 [Conf]
   
2. Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein, Mihai Budiu
   Tartan: evaluating spatial computation for whole program execution. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 2006, pp:163-174 [Conf]
   
3. Tiberiu Chelcea, Steven M. Nowick
   Low-Latency Asynchronous FIFO's Using Token Rings. [Citation Graph (0, 0)][DBLP]
   ASYNC, 2000, pp:210-0 [Conf]
   
4. Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein
   Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis. [Citation Graph (0, 0)][DBLP]
   ASYNC, 2007, pp:117-128 [Conf]
   
5. Girish Venkataramani, Tiberiu Chelcea, Seth Copen Goldstein, Tobias Bjerregaard
   SOMA: a tool for synthesizing and optimizing memory accesses in ASICs. [Citation Graph (0, 0)][DBLP]
   CODES+ISSS, 2005, pp:231-236 [Conf]
   
6. Tiberiu Chelcea, Steven M. Nowick
   Robust Interfaces for Mixed-Timing Systems with Application to Latency-Insensitive Protocols. [Citation Graph (0, 0)][DBLP]
   DAC, 2001, pp:21-26 [Conf]
   
7. Tiberiu Chelcea, Steven M. Nowick
   Resynthesis and peephole transformations for the optimization of large-scale asynchronous systems. [Citation Graph (0, 0)][DBLP]
   DAC, 2002, pp:405-410 [Conf]
   
8. Tiberiu Chelcea, Steven M. Nowick, Andrew Bardsley, Doug Edwards
   A Burst-Mode Oriented Back-End for the Balsa Synthesis System. [Citation Graph (0, 0)][DBLP]
   DATE, 2002, pp:330-337 [Conf]
   
9. Tiberiu Chelcea, Steven M. Nowick
   Resynthesis and Peephole Transformations for the Optimization of Large-Scale Asynchronous Systems. [Citation Graph (0, 0)][DBLP]
   IWLS, 2002, pp:355-360 [Conf]
   
10. Girish Venkataramani, Tobias Bjerregaard, Tiberiu Chelcea, Seth Copen Goldstein
    Hardware compilation of application-specific memory-access interconnect. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:5, pp:756-771 [Journal]
    
11. Tiberiu Chelcea, Steven M. Nowick
    Robust interfaces for mixed-timing systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:8, pp:857-873 [Journal]
    
12. Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein
    Self-Resetting Latches for Asynchronous Micro-Pipelines. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:986-989 [Conf]
    
13. Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, Seth Copen Goldstein
    Global Critical Path: A Tool for System-Level Timing Analysis. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:783-786 [Conf]