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Rajagopalan Desikan:
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- Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler
Scalable selective re-execution for EDGE architectures. [Citation Graph (0, 0)][DBLP] ASPLOS, 2004, pp:120-132 [Conf]
- Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler
Scalable Hardware Memory Disambiguation for High ILP Processors. [Citation Graph (0, 0)][DBLP] MICRO, 2003, pp:399-410 [Conf]
- Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. [Citation Graph (0, 0)][DBLP] MICRO, 2006, pp:480-491 [Conf]
- Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler
Scalable Hardware Memory Disambiguation for High-ILP Processors. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:118-127 [Journal]
- Rajagopalan Desikan, Doug Burger, Stephen W. Keckler, Llorenc Cruz, Fernando Latorre, Antonio González, Mateo Valero
Errata on "Measuring Experimental Error in Microprocessor Simulation". [Citation Graph (0, 0)][DBLP] SIGARCH Computer Architecture News, 2002, v:30, n:1, pp:2-4 [Journal]
Design and Implementation of the TRIPS Primary Memory System. [Citation Graph (, )][DBLP]
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