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Publications of Author

1. Walter Lee, Rajeev Barua, Matthew Frank, Devabhaktuni Srikrishna, Jonathan Babb, Vivek Sarkar, Saman P. Amarasinghe
   Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 1998, pp:46-57 [Conf]
   
2. Jonathan Babb, Martin C. Rinard, Csaba Andras Moritz, Walter Lee, Matthew Frank, Rajeev Barua, Saman P. Amarasinghe
   Parallelizing Applications into Silicon. [Citation Graph (0, 0)][DBLP]
   FCCM, 1999, pp:70-0 [Conf]
   
3. Kenneth Mackenzie, John Kubiatowicz, Matthew Frank, Walter Lee, Victor Lee, Anant Agarwal, M. Frans Kaashoek
   Exploiting Two-Case Delivery for Fast Protected Messaging. [Citation Graph (0, 0)][DBLP]
   HPCA, 1998, pp:231-242 [Conf]
   
4. Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
   Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture. [Citation Graph (0, 0)][DBLP]
   HPCA, 2003, pp:341-353 [Conf]
   
5. Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
   Maps: A Compiler-Managed Memory System for Raw Machines. [Citation Graph (0, 0)][DBLP]
   ISCA, 1999, pp:4-15 [Conf]
   
6. Michael Bedford Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal
   Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams. [Citation Graph (0, 0)][DBLP]
   ISCA, 2004, pp:2-13 [Conf]
   
7. Walter Lee, Matthew Frank, Victor Lee, Kenneth Mackenzie, Larry Rudolph
   Implications of I/O for Gang Scheduled Workloads. [Citation Graph (0, 0)][DBLP]
   JSSPP, 1997, pp:215-237 [Conf]
   
8. Jeffrey Sheldon, Walter Lee, Ben Greenwald, Saman P. Amarasinghe
   Strength Reduction of Integer Division and Modulo Operations. [Citation Graph (0, 0)][DBLP]
   LCPC, 2001, pp:254-273 [Conf]
   
9. Walter Lee, Diego Puppin, Shane Swenson, Saman P. Amarasinghe
   Convergent scheduling. [Citation Graph (0, 0)][DBLP]
   MICRO, 2002, pp:111-122 [Conf]
   
10. Elliot Waingold, Michael Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman P. Amarasinghe, Anant Agarwal
    Baring It All to Software: Raw Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:9, pp:86-93 [Journal]
    
11. Michael Bedford Taylor, Jason Sungtae Kim, Jason E. Miller, David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jae-Wook Lee, Walter Lee, Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal
    The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2002, v:22, n:2, pp:25-35 [Journal]
    
12. Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
    Compiler Support for Scalable and Efficient Memory Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:11, pp:1234-1247 [Journal]
    
13. Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
    Scalar Operand Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:2, pp:145-162 [Journal]