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Rajeev Barua: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Walter Lee, Rajeev Barua, Matthew Frank, Devabhaktuni Srikrishna, Jonathan Babb, Vivek Sarkar, Saman P. Amarasinghe
    Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1998, pp:46-57 [Conf]
  2. Oren Avissar, Rajeev Barua, Dave Stewart
    Heterogeneous memory management for embedded systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:34-43 [Conf]
  3. Surupa Biswas, Matthew Simpson, Rajeev Barua
    Memory overflow protection for embedded systems using run-time checks, reuse and compression. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:280-291 [Conf]
  4. Bhuvan Middha, Matthew Simpson, Rajeev Barua
    MTSS: multi task stack sharing for embedded systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:191-201 [Conf]
  5. Nghi Nguyen, Angel Dominguez, Rajeev Barua
    Memory allocation for embedded systems with a compile-time-unknown scratch-pad size. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:115-125 [Conf]
  6. Matthew Simpson, Bhuvan Middha, Rajeev Barua
    Segment protection for embedded systems using run-time checks. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:66-77 [Conf]
  7. Sumesh Udayakumaran, Rajeev Barua
    Compiler-decided dynamic memory allocation for scratch-pad based embedded systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2003, pp:276-286 [Conf]
  8. T. Vinod Kumar Gupta, Roberto E. Ko, Rajeev Barua
    Compiler-directed customization of ASIP cores. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:97-102 [Conf]
  9. Anant Agarwal, David A. Kranz, Rajeev Barua, Venkat Natarajan
    Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    Compiler Optimizations for Scalable Parallel Systems Languages, 2001, pp:285-338 [Conf]
  10. Steve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu
    Dynamic Functional Unit Assignment for Low Power. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11052-11057 [Conf]
  11. Sumesh Udayakumaran, Rajeev Barua
    An integrated scratch-pad allocator for affine and non-affine code. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:925-930 [Conf]
  12. Jonathan Babb, Matthew Frank, Victor Lee, Elliot Waingold, Rajeev Barua, Michael Taylor, Jang Kim, Devabhaktuni Srikrishna, Anant Agarwal
    The RAW benchmark suite: computation structures for general purpose computing. [Citation Graph (0, 0)][DBLP]
    FCCM, 1997, pp:134-144 [Conf]
  13. Jonathan Babb, Martin C. Rinard, Csaba Andras Moritz, Walter Lee, Matthew Frank, Rajeev Barua, Saman P. Amarasinghe
    Parallelizing Applications into Silicon. [Citation Graph (0, 0)][DBLP]
    FCCM, 1999, pp:70-0 [Conf]
  14. Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz, Anant Agarwal
    The Sensitivity of Communication Mechanisms to Bandwidth and Latency. [Citation Graph (0, 0)][DBLP]
    HPCA, 1998, pp:37-46 [Conf]
  15. Yi Zhang, Steve Haga, Rajeev Barua
    Execution history guided instruction prefetching. [Citation Graph (0, 0)][DBLP]
    ICS, 2002, pp:199-208 [Conf]
  16. Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
    Maps: A Compiler-Managed Memory System for Raw Machines. [Citation Graph (0, 0)][DBLP]
    ISCA, 1999, pp:4-15 [Conf]
  17. Rajeev Barua, David A. Kranz, Anant Agarwal
    Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    LCPC, 1996, pp:350-368 [Conf]
  18. Thomas W. Carley, Moussa A. Ba, Rajeev Barua, David B. Stewart
    Contention-Free Periodic Message Scheduler Medium Access Control in Wireless Sensor / Actuator Networks. [Citation Graph (0, 0)][DBLP]
    RTSS, 2003, pp:298-307 [Conf]
  19. Elliot Waingold, Michael Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman P. Amarasinghe, Anant Agarwal
    Baring It All to Software: Raw Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:9, pp:86-93 [Journal]
  20. Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
    Compiler Support for Scalable and Efficient Memory Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:11, pp:1234-1247 [Journal]
  21. Oren Avissar, Rajeev Barua, Dave Stewart
    An optimal memory allocation scheme for scratch-pad-based embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2002, v:1, n:1, pp:6-26 [Journal]
  22. Sumesh Udayakumaran, Angel Dominguez, Rajeev Barua
    Dynamic allocation for scratch-pad memory using compile-time decisions. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:472-511 [Journal]
  23. Surupa Biswas, Thomas W. Carley, Matthew Simpson, Bhuvan Middha, Rajeev Barua
    Memory overflow protection for embedded systems using run-time checks, reuse, and compression. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:4, pp:719-752 [Journal]
  24. Steve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu
    Dynamic Functional Unit Assignment for Low Power. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2005, v:31, n:1, pp:47-62 [Journal]
  25. Yi Zhang, Steve Haga, Rajeev Barua
    Execution History Guided Instruction Prefetching. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2004, v:27, n:2, pp:129-147 [Journal]
  26. Angel Dominguez, Nghi Nguyen, Rajeev Barua
    Recursive function data allocation to scratch-pad memory. [Citation Graph (0, 0)][DBLP]
    CASES, 2007, pp:65-74 [Conf]
  27. Nghi Nguyen, Angel Dominguez, Rajeev Barua
    Scratch-pad memory allocation without compiler support for java applications. [Citation Graph (0, 0)][DBLP]
    CASES, 2007, pp:85-94 [Conf]

  28. Instruction cache locking inside a binary rewriter. [Citation Graph (, )][DBLP]


  29. Resource-Aware Compiler Prefetching for Many-Cores. [Citation Graph (, )][DBLP]


  30. Lazy binary-splitting: a run-time adaptive work-stealing scheduler. [Citation Graph (, )][DBLP]


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