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Chi-Keung Luk: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chi-Keung Luk, Todd C. Mowry
    Compiler-Based Prefetching for Recursive Data Structures. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1996, pp:222-233 [Conf]
  2. Chi-Keung Luk
    Memory disambiguation for general-purpose applications. [Citation Graph (0, 0)][DBLP]
    CASCON, 1995, pp:43- [Conf]
  3. Chi-Keung Luk, Robert Muth, Harish Patil, Robert S. Cohn, P. Geoffrey Lowney
    Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:15-26 [Conf]
  4. Chi-Keung Luk, Robert Muth, Harish Patil, Richard Weiss, P. Geoffrey Lowney, Robert S. Cohn
    Profile-guided post-link stride prefetching. [Citation Graph (0, 0)][DBLP]
    ICS, 2002, pp:167-178 [Conf]
  5. Chi-Keung Luk
    Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2001, pp:40-51 [Conf]
  6. Chi-Keung Luk, Todd C. Mowry
    Memory Forwarding: Enabling Aggressive Layout Optimizations by Guaranteeing the Safety of Data Relocation. [Citation Graph (0, 0)][DBLP]
    ISCA, 1999, pp:88-99 [Conf]
  7. Todd C. Mowry, Chi-Keung Luk
    Predicting Data Cache Misses in Non-Numeric Applications through Correlation Profiling. [Citation Graph (0, 0)][DBLP]
    MICRO, 1997, pp:314-320 [Conf]
  8. Chi-Keung Luk, Todd C. Mowry
    Cooperative Prefetching: Compiler and Hardware Support for Effective Instruction Prefetching in Modern Processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1998, pp:182-194 [Conf]
  9. Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood
    Pin: building customized program analysis tools with dynamic instrumentation. [Citation Graph (0, 0)][DBLP]
    PLDI, 2005, pp:190-200 [Conf]
  10. Joel S. Emer, Pritpal Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan
    Asim: A Performance Model Framework. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2002, v:35, n:2, pp:68-76 [Journal]
  11. Chi-Keung Luk, Todd C. Mowry
    Automatic Compiler-Inserted Prefetching for Pointer-Based Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:2, pp:134-141 [Journal]
  12. Todd C. Mowry, Chi-Keung Luk
    Understanding Why Correlation Profiling Improves the Predictability of Data Cache Misses in Nonnumeric Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:4, pp:369-384 [Journal]
  13. Chi-Keung Luk, Todd C. Mowry
    Architectural and compiler support for effective instruction prefetching: a cooperative approach. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Comput. Syst., 2001, v:19, n:1, pp:71-109 [Journal]
  14. Prashanth P. Bungale, Chi-Keung Luk
    PinOS: a programmable framework for whole-system dynamic instrumentation. [Citation Graph (0, 0)][DBLP]
    VEE, 2007, pp:137-147 [Conf]

  15. Qilin: exploiting parallelism on heterogeneous multiprocessors with adaptive mapping. [Citation Graph (, )][DBLP]

  16. Analyzing Parallel Programs with Pin. [Citation Graph (, )][DBLP]

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