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Shubhendu S. Mukherjee:
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Publications of Author
- Shubhendu S. Mukherjee, Federico Silla, Peter J. Bannon, Joel S. Emer, Steven Lang, David Webb
A comparative study of arbitration algorithms for the Alpha 21364 pipelined router. [Citation Graph (0, 0)][DBLP] ASPLOS, 2002, pp:223-234 [Conf]
- Shubhendu S. Mukherjee, Joel S. Emer, Steven K. Reinhardt
The Soft Error Problem: An Architectural Perspective. [Citation Graph (0, 0)][DBLP] HPCA, 2005, pp:243-247 [Conf]
- Shubhendu S. Mukherjee, Mark D. Hill
The Impact of Data Transfer and Buffering Alternatives on Network Interface Design. [Citation Graph (0, 0)][DBLP] HPCA, 1998, pp:207-218 [Conf]
- Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S. Mukherjee
Self-Tuned Congestion Control for Multiprocessor Networks. [Citation Graph (0, 0)][DBLP] HPCA, 2001, pp:107-0 [Conf]
- Shubhendu S. Mukherjee, Mark D. Hill
An evaluation of directory protocols for medium-scale shared-memory multiprocessors. [Citation Graph (0, 0)][DBLP] International Conference on Supercomputing, 1994, pp:64-74 [Conf]
- Kun Luo, Manoj Franklin, Shubhendu S. Mukherjee, André Seznec
Boosting SMT Performance by Speculation Control. [Citation Graph (0, 0)][DBLP] IPDPS, 2001, pp:2- [Conf]
- Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S. Mukherjee
BLAM : A High-Performance Routing Algorithm for Virtual Cut-Through Networks. [Citation Graph (0, 0)][DBLP] IPDPS, 2003, pp:45- [Conf]
- Arijit Biswas, Paul Racunas, Razvan Cheveresan, Joel S. Emer, Shubhendu S. Mukherjee, Ram Rangan
Computing Architectural Vulnerability Factors for Address-Based Structures. [Citation Graph (0, 0)][DBLP] ISCA, 2005, pp:532-543 [Conf]
- Shubhendu S. Mukherjee, Babak Falsafi, Mark D. Hill, David A. Wood
Coherent Network Interfaces for Fine-Grain Communication. [Citation Graph (0, 0)][DBLP] ISCA, 1996, pp:247-258 [Conf]
- Shubhendu S. Mukherjee, Mark D. Hill
Using Prediction to Accelerate Coherence Protocols. [Citation Graph (0, 0)][DBLP] ISCA, 1998, pp:179-190 [Conf]
- Shubhendu S. Mukherjee, Michael Kontz, Steven K. Reinhardt
Detailed Design and Evaluation of Redundant Multithreading Alternatives. [Citation Graph (0, 0)][DBLP] ISCA, 2002, pp:99-110 [Conf]
- Steven K. Reinhardt, Shubhendu S. Mukherjee
Transient fault detection via simultaneous multithreading. [Citation Graph (0, 0)][DBLP] ISCA, 2000, pp:25-36 [Conf]
- George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee
Design and Evaluation of Hybrid Fault-Detection Systems. [Citation Graph (0, 0)][DBLP] ISCA, 2005, pp:148-159 [Conf]
- Christopher Weaver, Joel S. Emer, Shubhendu S. Mukherjee, Steven K. Reinhardt
Techniques to Reduce the Soft Error Rate of a High-Performance Microprocessor. [Citation Graph (0, 0)][DBLP] ISCA, 2004, pp:264-275 [Conf]
- David A. Wood, Satish Chandra, Babak Falsafi, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, Shubhendu S. Mukherjee, Subbarao Palacharla, Steven K. Reinhardt
Mechanisms for Cooperative Shared Memory. [Citation Graph (0, 0)][DBLP] ISCA, 1993, pp:156-167 [Conf]
- Shubhendu S. Mukherjee, Christopher Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor. [Citation Graph (0, 0)][DBLP] MICRO, 2003, pp:29-42 [Conf]
- Shubhendu S. Mukherjee, Shamik D. Sharma, Mark D. Hill, James R. Larus, Anne Rogers, Joel H. Saltz
Efficient Support for Irregular Applications on Distributed-Memory Machines. [Citation Graph (0, 0)][DBLP] PPOPP, 1995, pp:68-79 [Conf]
- Shubhendu S. Mukherjee, Joel S. Emer, Tryggve Fossum, Steven K. Reinhardt
Cache Scrubbing in Microprocessors: Myth or Necessity? [Citation Graph (0, 0)][DBLP] PRDC, 2004, pp:37-42 [Conf]
- Andrew A. Chien, Mark D. Hill, Shubhendu S. Mukherjee
Design Challenges for High-Performance Network Interfaces - Guest Editors' Introduction. [Citation Graph (0, 0)][DBLP] IEEE Computer, 1998, v:31, n:11, pp:42-44 [Journal]
- Joel S. Emer, Pritpal Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan
Asim: A Performance Model Framework. [Citation Graph (0, 0)][DBLP] IEEE Computer, 2002, v:35, n:2, pp:68-76 [Journal]
- Shubhendu S. Mukherjee, Sarita V. Adve, Todd M. Austin, Joel S. Emer, Peter S. Magnusson
Performance Simulation Tools. [Citation Graph (0, 0)][DBLP] IEEE Computer, 2002, v:35, n:2, pp:38-39 [Journal]
- Shubhendu S. Mukherjee, Mark D. Hill
Making Network Interfaces Less Peripheral. [Citation Graph (0, 0)][DBLP] IEEE Computer, 1998, v:31, n:10, pp:70-76 [Journal]
- Paul R. Wilson, Sheetal V. Kakkad, Shubhendu S. Mukherjee
Anomalies and adaptation in the analysis and development of prepaging policies. [Citation Graph (0, 0)][DBLP] Journal of Systems and Software, 1994, v:27, n:2, pp:147-153 [Journal]
- Shubhendu S. Mukherjee, Peter J. Bannon, Steven Lang, Aaron Spink, David Webb
The Alpha 21364 Network Architecture. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2002, v:22, n:1, pp:26-35 [Journal]
- Shubhendu S. Mukherjee, Chris Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin
Measuring Architectural Vulnerability Factors. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2003, v:23, n:6, pp:70-75 [Journal]
- Christopher Weaver, Joel S. Emer, Shubhendu S. Mukherjee, Steven K. Reinhardt
Reducing the Soft-Error Rate of a High-Performance Microprocessor. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:30-37 [Journal]
- George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee
Software-controlled fault tolerance. [Citation Graph (0, 0)][DBLP] TACO, 2005, v:2, n:4, pp:366-396 [Journal]
- Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S. Mukherjee
Exploiting Global Knowledge to Achieve Self-Tuned Congestion Control for k-Ary n-Cube Networks. [Citation Graph (0, 0)][DBLP] IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:3, pp:257-272 [Journal]
Perturbation-based Fault Screening. [Citation Graph (, )][DBLP]
CAMP: A technique to estimate per-structure power at run-time using a few simple parameters. [Citation Graph (, )][DBLP]
Architectural core salvaging in a multi-core processor for hard-error tolerance. [Citation Graph (, )][DBLP]
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