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Christopher J. Hughes: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ruchira Sasanka, Christopher J. Hughes, Sarita V. Adve
    Joint local and global hardware adaptations for energy. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2002, pp:144-155 [Conf]
  2. Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen
    Speculative precomputation: long-range prefetching of delinquent loads. [Citation Graph (0, 0)][DBLP]
    ISCA, 2001, pp:14-25 [Conf]
  3. Christopher J. Hughes, Sarita V. Adve
    A Formal Approach to Frequent Energy Adaptations for Multimedia Applications. [Citation Graph (0, 0)][DBLP]
    ISCA, 2004, pp:138-149 [Conf]
  4. Christopher J. Hughes, Praful Kaul, Sarita V. Adve, Rohit Jain, Chanik Park, Jayanth Srinivasan
    Variability in the execution of multimedia applications and implications for architecture. [Citation Graph (0, 0)][DBLP]
    ISCA, 2001, pp:254-265 [Conf]
  5. Christopher J. Hughes, Jayanth Srinivasan, Sarita V. Adve
    Saving energy with architectural and frequency adaptations for multimedia applications. [Citation Graph (0, 0)][DBLP]
    MICRO, 2001, pp:250-261 [Conf]
  6. Sanjeev Kumar, Michael Chu, Christopher J. Hughes, Partha Kundu, Anthony Nguyen
    Hybrid transactional memory. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2006, pp:209-220 [Conf]
  7. Rohit Jain, Christopher J. Hughes, Sarita V. Adve
    Soft Real- Time Scheduling on Simultaneous Multithreaded Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 2002, pp:134-0 [Conf]
  8. Christopher J. Hughes, Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve
    RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2002, v:35, n:2, pp:40-49 [Journal]
  9. Christopher J. Hughes, Sarita V. Adve
    Memory-side prefetching for linked data structures for processor-in-memory systems. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2005, v:65, n:4, pp:448-463 [Journal]
  10. Sanjeev Kumar, Christopher J. Hughes, Anthony Nguyen
    Carbon: architectural support for fine-grained parallelism on chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2007, pp:162-173 [Conf]
  11. Christopher J. Hughes, Radek Grzeszczuk, Eftychios Sifakis, Daehyun Kim, Sanjeev Kumar, Andrew Selle, Jatin Chhugani, Matthew J. Holliman, Yen-Kuang Chen
    Physical simulation for animation and visual effects: parallelization and characterization for chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2007, pp:220-231 [Conf]

  12. Computer Vision on Multi-Core Processors: Articulated Body Tracking. [Citation Graph (, )][DBLP]

  13. Atomic Vector Operations on Chip Multiprocessors. [Citation Graph (, )][DBLP]

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