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Alexandra Fedorova: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Peter Damron, Alexandra Fedorova, Yossi Lev, Victor Luchangco, Mark Moir, Daniel Nussbaum
    Hybrid transactional memory. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2006, pp:336-346 [Conf]
  2. Kostas Magoutis, Salimah Addetia, Alexandra Fedorova, Margo I. Seltzer
    Making the Most Out of Direct-Access Network Attached Storage. [Citation Graph (0, 0)][DBLP]
    FAST, 2003, pp:- [Conf]
  3. Kostas Magoutis, Salimah Addetia, Alexandra Fedorova, Margo I. Seltzer, Jeffrey S. Chase, Andrew J. Gallatin, Richard Kisley, Rajiv Wickremesinghe, Eran Gabber
    Structure and Performance of the Direct Access File System. [Citation Graph (0, 0)][DBLP]
    USENIX Annual Technical Conference, General Track, 2002, pp:1-14 [Conf]
  4. Alexandra Fedorova, Margo I. Seltzer, Christopher Small, Daniel Nussbaum
    Performance of Multithreaded Chip Multiprocessors and Implications for Operating System Design. [Citation Graph (0, 0)][DBLP]
    USENIX Annual Technical Conference, General Track, 2005, pp:395-398 [Conf]
  5. Alexandra Fedorova, Margo I. Seltzer, Kostas Magoutis, Salimah Addetia
    Application performance on the Direct Access File System. [Citation Graph (0, 0)][DBLP]
    WOSP, 2004, pp:84-93 [Conf]

  6. Improving Performance Isolation on Chip Multiprocessors via an Operating System Scheduler. [Citation Graph (, )][DBLP]


  7. Addressing shared resource contention in multicore processors via scheduling. [Citation Graph (, )][DBLP]


  8. Operating system support for mitigating software scalability bottlenecks on asymmetric multicore processors. [Citation Graph (, )][DBLP]


  9. Performance Implications of Cache Affinity on Multicore Processors. [Citation Graph (, )][DBLP]


  10. Searching for Concurrent Design Patterns in Video Games. [Citation Graph (, )][DBLP]


  11. The Many Faces of Systems Research - and How to Evaluate Them. [Citation Graph (, )][DBLP]


  12. Scheduling support for transactional memory contention management. [Citation Graph (, )][DBLP]


  13. Chip multithreading systems need a new operating system scheduler. [Citation Graph (, )][DBLP]


  14. AASH: an asymmetry-aware scheduler for hypervisors. [Citation Graph (, )][DBLP]


  15. A comprehensive scheduler for asymmetric multicore systems. [Citation Graph (, )][DBLP]


  16. Evaluation of the Intel. [Citation Graph (, )][DBLP]


  17. Maximizing power efficiency with asymmetric multicore systems. [Citation Graph (, )][DBLP]


  18. Managing contention for shared resources on multicore processors. [Citation Graph (, )][DBLP]


  19. Scaling Turbo Boost to a 1000 cores [Citation Graph (, )][DBLP]


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