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Engin Ipek: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Engin Ipek, Sally A. McKee, Rich Caruana, Bronis R. de Supinski, Martin Schulz
    Efficiently exploring architectural design spaces via predictive modeling. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2006, pp:195-206 [Conf]
  2. Engin Ipek, Bronis R. de Supinski, Martin Schulz, Sally A. McKee
    An Approach to Performance Prediction for Parallel Applications. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2005, pp:196-205 [Conf]
  3. Engin Ipek, José F. Martínez, Bronis R. de Supinski, Sally A. McKee, Martin Schulz
    Dynamic program phase detection in distributed shared-memory multiprocessors. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  4. Christopher LaFrieda, Engin Ipek, José F. Martínez, Rajit Manohar
    Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor. [Citation Graph (0, 0)][DBLP]
    DSN, 2007, pp:317-326 [Conf]
  5. Engin Ipek, Meyrem Kirman, Nevin Kirman, José F. Martínez
    A Reconfigurable Chip Multiprocessor Architecture to Accommodate Software Diversity. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-6 [Conf]
  6. Engin Ipek, Meyrem Kirman, Nevin Kirman, José F. Martínez
    Core fusion: accommodating software diversity in chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2007, pp:186-197 [Conf]

  7. Dynamically replicated memory: building reliable systems from nanoscale resistive memories. [Citation Graph (, )][DBLP]


  8. Architecting phase change memory as a scalable dram alternative. [Citation Graph (, )][DBLP]


  9. Self-Optimizing Memory Controllers: A Reinforcement Learning Approach. [Citation Graph (, )][DBLP]


  10. Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing. [Citation Graph (, )][DBLP]


  11. Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach. [Citation Graph (, )][DBLP]


  12. Better I/O through byte-addressable, persistent memory. [Citation Graph (, )][DBLP]


  13. Phase change memory architecture and the quest for scalability. [Citation Graph (, )][DBLP]


  14. Predicting parallel application performance via machine learning approaches. [Citation Graph (, )][DBLP]


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