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Publications of Author

1. Tin Wai Kwan, Maitham Shams
   Design of High-Performance Power-Aware Asynchronous Pipelined Circuits in MOS Current Mode Logic. [Citation Graph (0, 0)][DBLP]
   ASYNC, 2005, pp:23-32 [Conf]
   
2. Osman Musa Abdulkarim, Maitham Shams
   A symmetric mos current-mode logic universal gate for high speed applications. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2007, pp:212-215 [Conf]
   
3. Maitham Shams, Mohamed I. Elmasry
   Delay Optimization of CMOS Logic Circuits Using Closed-Form Expressions. [Citation Graph (0, 0)][DBLP]
   ICCD, 1999, pp:563-568 [Conf]
   
4. Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry
   Optimizing CMOS Implementations of the C-element. [Citation Graph (0, 0)][DBLP]
   ICCD, 1997, pp:700-705 [Conf]
   
5. Shahnam Khabiri, Maitham Shams
   An MCML four-bit ripple-carry adder design in 1 GHz range. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2005, pp:1634-1637 [Conf]
   
6. Shahnam Khabiri, Maitham Shams
   A mathematical programming approach to designing MOS current-mode logic circuits. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2005, pp:2425-2428 [Conf]
   
7. Yuanzhong Wan, Maitham Shams
   Delay modeling of CMOS/CPL logic circuits. [Citation Graph (0, 0)][DBLP]
   ISCAS (6), 2005, pp:5613-5616 [Conf]
   
8. Maitham Shams, Mohamed I. Elmasry
   A formulation for quick evaluation and optimization of digital CMOS circuits. [Citation Graph (0, 0)][DBLP]
   ISCAS (6), 1999, pp:326-329 [Conf]
   
9. Shahnam Khabiri, Maitham Shams
   Implementation of MCML universal logic gate for 10 GHz-range in 0.13 µm CMOS technology. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:653-656 [Conf]
   
10. Tin Wai Kwan, Maitham Shams
    Multi-GHz energy-efficient asynchronous pipelined circuits in MOS Current Mode Logic. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:645-648 [Conf]
    
11. Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry
    A comparison of CMOS implementations of an asynchronous circuits primitive: the C-element. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:93-96 [Conf]
    
12. Muhammad Arsalan, Maitham Shams
    Charge-Recovery Power Clock Generators for Adiabatic Logic Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:171-174 [Conf]
    
13. Tin Wai Kwan, Maitham Shams
    Design of Multi-GHz Asynchronous Pipelined Circuits in MOS Current-Mode Logic. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:301-306 [Conf]
    
14. Yuanzhong Wan, Maitham Shams
    Optimization of Mixed Logic Circuits with Application to a 64-Bit Static Adder. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:261-266 [Conf]
    
15. Muhammad Arsalan, Maitham Shams
    Asynchronous Adiabatic Logic. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3720-3723 [Conf]
    
16. Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry
    Modeling and comparing CMOS implementations of the C-element. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:4, pp:563-567 [Journal]
    
17. 
    Implementation of asynchronous pipeline circuits in multi-threshold CMOS technologies. [Citation Graph (, )][DBLP]