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Kenneth L. Shepard: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Yee William Li, George Patounakis, Anup Jose, Kenneth L. Shepard, Steven M. Nowick
Asynchronous Datapath with Software-Controlled On-Chip Adaptive Voltage Scaling for Multirate Signal Processing Application. [Citation Graph (0, 0)][DBLP]
ASYNC, 2003, pp:216-226 [Conf] - Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis
Continuous-Time Digital Signal Processors. [Citation Graph (0, 0)][DBLP]
ASYNC, 2005, pp:138-143 [Conf] - Phillip Restle, Kenneth L. Shepard
New Prospects for Clocking Synchronous and Quasi-Asynchronous Systems. [Citation Graph (0, 0)][DBLP]
ASYNC, 2005, pp:- [Conf] - N. S. Nagaraj, Kenneth L. Shepard, Takahide Inone
Taming Noise in Deep Submicron Digital Integrated Circuits (Panel). [Citation Graph (0, 0)][DBLP]
DAC, 1998, pp:100-101 [Conf] - Kenneth L. Shepard
Design Methodologies for Noise in Digital Integrated Circuits. [Citation Graph (0, 0)][DBLP]
DAC, 1998, pp:94-99 [Conf] - Kenneth L. Shepard, Dae-Jin Kim
Static noise analysis for digital integrated circuits in partially-depleted silicon-on-insulator technology. [Citation Graph (0, 0)][DBLP]
DAC, 2000, pp:239-242 [Conf] - Robert C. Aitken, Jason Cong, Randy Harr, Kenneth L. Shepard, Wayne Wolf
How will CAD handle billion-transistor systems? (panel). [Citation Graph (0, 0)][DBLP]
ICCAD, 1998, pp:5- [Conf] - Steven C. Chan, Kenneth L. Shepard
Practical Considerations in RLCK Crosstalk Analysis for Digital Integrated Circuits. [Citation Graph (0, 0)][DBLP]
ICCAD, 2001, pp:598-0 [Conf] - Kenneth L. Shepard, Dae-Jin Kim
Body-voltage estimation in digital PD-SOI circuits and its application to static timing analysis. [Citation Graph (0, 0)][DBLP]
ICCAD, 1999, pp:531-538 [Conf] - Kenneth L. Shepard, Vinod Narayanan
Noise in deep submicron digital design. [Citation Graph (0, 0)][DBLP]
ICCAD, 1996, pp:524-531 [Conf] - Kenneth L. Shepard, Vinod Narayanan, Peter C. Elmendorf, Gutuan Zheng
Global harmony: coupled noise analysis for full-chip RC interconnect networks. [Citation Graph (0, 0)][DBLP]
ICCAD, 1997, pp:139-146 [Conf] - Kenneth L. Shepard, Dipak Sitaram, Yu Zheng
Full-Chip, Three-Dimensional, Shapes-Based RLC Extraction. [Citation Graph (0, 0)][DBLP]
ICCAD, 2000, pp:142-149 [Conf] - Dipak Sitaram, Yu Zheng, Kenneth L. Shepard
Implicit treatment of substrate and power-ground losses in return-limited inductance extraction. [Citation Graph (0, 0)][DBLP]
ICCAD, 2002, pp:16-22 [Conf] - Kenneth L. Shepard, Daniel N. Maynard
Variability and yield improvement: rules, models, and characterization. [Citation Graph (0, 0)][DBLP]
ICCAD, 2006, pp:834-835 [Conf] - Steven C. Chan, Kenneth L. Shepard, Phillip Restle
Design of Resonant Global Clock Distributions. [Citation Graph (0, 0)][DBLP]
ICCD, 2003, pp:248-253 [Conf] - Saravanan Rajapandian, Zheng Xu, Kenneth L. Shepard
Charge-Recycling Voltage Domains for Energy-Efficient Low-Voltage Operation of Digital CMOS Circuits. [Citation Graph (0, 0)][DBLP]
ICCD, 2003, pp:98-102 [Conf] - Kenneth L. Shepard
Practical Issues of Interconnect Analysis in Deep Submicron Integrated Circuits. [Citation Graph (0, 0)][DBLP]
ICCD, 1997, pp:532-541 [Conf] - Kenneth L. Shepard, S. Carey, Daniel K. Beece, Robert F. Hatch, Gregory A. Northrop
Design Methodology for the High-Performance G4 S/390. [Citation Graph (0, 0)][DBLP]
ICCD, 1997, pp:232-240 [Conf] - Kenneth L. Shepard, Yu Zheng
On-Chip Oscilloscopes for Noninvasive Time-domain Measurement of Waveforms. [Citation Graph (0, 0)][DBLP]
ICCD, 2001, pp:221-227 [Conf] - Kenneth L. Shepard
CAD Issues for CMOS VLSI Design in SOI. [Citation Graph (0, 0)][DBLP]
ISQED, 2001, pp:105-110 [Conf] - Kenneth L. Shepard, Vinod Narayanan
Conquering Noise in Deep-Submicron Digital ICs. [Citation Graph (0, 0)][DBLP]
IEEE Design & Test of Computers, 1998, v:15, n:1, pp:51-62 [Journal] - Steven C. Chan, Kenneth L. Shepard, Dae-Jin Kim
Static noise analysis for digital integrated circuits in partially depleted silicon-on-insulator technology. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:8, pp:916-927 [Journal] - Kenneth L. Shepard, Dae-Jin Kim
Body-voltage estimation in digital PD-SOI circuits and itsapplication to static timing analysis. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:7, pp:888-901 [Journal] - Kenneth L. Shepard, Vinod Narayanan, Ron Rose
Harmony: static noise analysis of deep submicron digital integrated circuits. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:8, pp:1132-1150 [Journal] - Kenneth L. Shepard, Zhong Tian
Return-limited inductances: a practical approach to on-chipinductance extraction. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:4, pp:425-436 [Journal] - Dipak Sitaram, Yu Zheng, Kenneth L. Shepard
Full-chip, three-dimensional shapes-based RLC extraction. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:5, pp:711-727 [Journal] - Yu Zheng, Kenneth L. Shepard
On-chip oscilloscopes for noninvasive time-domain measurement of waveforms in digital integrated circuits. [Citation Graph (0, 0)][DBLP]
IEEE Trans. VLSI Syst., 2003, v:11, n:3, pp:336-344 [Journal]
Characterization and modeling of graphene field-effect devices. [Citation Graph (, )][DBLP]
On-chip transistor characterization arrays with digital interfaces for variability characterization. [Citation Graph (, )][DBLP]
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