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Peter W. Cook: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Peter W. Cook, Stanley Schuster
    Synchronous Interlocked Pipelines. [Citation Graph (0, 0)][DBLP]
    ASYNC, 2002, pp:3-12 [Conf]
  2. Alper Buyuktosunoglu, David H. Albonesi, Stanley Schuster, David Brooks, Pradip Bose, Peter W. Cook
    A circuit level implementation of an adaptive issue queue for power-aware microprocessors. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2001, pp:73-78 [Conf]
  3. Alper Buyuktosunoglu, David H. Albonesi, Pradip Bose, Peter W. Cook, Stanley Schuster
    Tradeoffs in power-efficient issue queue design. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:184-189 [Conf]
  4. Koushik K. Das, Rajiv V. Joshi, Ching-Te Chuang, Peter W. Cook, Richard B. Brown
    New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technology. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:168-171 [Conf]
  5. Pradip Bose, David Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas
    Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. [Citation Graph (0, 0)][DBLP]
    PACS, 2002, pp:1-17 [Conf]
  6. Alper Buyuktosunoglu, Stanley Schuster, David Brooks, Pradip Bose, Peter W. Cook, David H. Albonesi
    An Adaptive Issue Queue for Reduced Power at High Performance. [Citation Graph (0, 0)][DBLP]
    PACS, 2000, pp:25-39 [Conf]
  7. David H. Albonesi, Rajeev Balasubramonian, Steve Dropsho, Sandhya Dwarkadas, Eby G. Friedman, Michael C. Huang, Volkan Kursun, Grigorios Magklis, Michael L. Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter W. Cook, Stanley Schuster
    Dynamically Tuning Processor Resources with Adaptive Processing. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2003, v:36, n:12, pp:49-58 [Journal]
  8. Peter W. Cook
    Constraint Solver for Generalized IC Layout. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 1984, v:28, n:5, pp:581-589 [Journal]
  9. David Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook
    Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:26-44 [Journal]

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