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Shai Rotem: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wei-Chun Chou, Peter A. Beerel, Ran Ginosar, Rakefet Kol, Chris J. Myers, Shai Rotem, Ken S. Stevens, Kenneth Y. Yun
    Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1998, pp:80-0 [Conf]
  2. Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri
    CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. [Citation Graph (0, 0)][DBLP]
    ASYNC, 2000, pp:62-72 [Conf]
  3. Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun
    RAPPID: An Asynchronous Instruction Length Decoder. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1999, pp:60-70 [Conf]
  4. Ken S. Stevens, Shai Rotem, Ran Ginosar
    Relative Timing. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1999, pp:208-218 [Conf]
  5. Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem
    Coordinated transformations for high-level synthesis of high performance microprocessor blocks. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:898-903 [Conf]
  6. Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken
    CAD Directions for High Performance Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:116-121 [Conf]
  7. Ken S. Stevens, Ran Ginosar, Shai Rotem
    Relative timing [asynchronous design]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:1, pp:129-140 [Journal]

  8. TAO: two-level atomicity for dynamic binary optimizations. [Citation Graph (, )][DBLP]

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