Search the dblp DataBase
Ivan E. Sutherland: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Ivan E. Sutherland, Robert F. Sproull, Robert A. Schumacker
A Characterization of Ten Hidden-Surface Algorithms. [Citation Graph (2, 0)][DBLP]
ACM Comput. Surv., 1974, v:6, n:1, pp:1-55 [Journal] - Bill Coates, Jo C. Ebergen, Jon K. Lexau, Scott Fairbanks, Ian W. Jones, Alex Ridgway, David Harris, Ivan E. Sutherland
A Counterflow Pipeline Experiment. [Citation Graph (0, 0)][DBLP]
ASYNC, 1999, pp:161-172 [Conf] - William S. Coates, Jon K. Lexau, Ian W. Jones, Scott M. Fairbanks, Ivan E. Sutherland
FLEETzero: An Asynchronous Switching Experiment. [Citation Graph (0, 0)][DBLP]
ASYNC, 2001, pp:173-0 [Conf] - William S. Coates, Jon K. Lexau, Ian W. Jones, Scott M. Fairbanks, Ivan E. Sutherland
A FIFO Data Switch Design Experiment. [Citation Graph (0, 0)][DBLP]
ASYNC, 1998, pp:4-0 [Conf] - Robert J. Drost, Ivan E. Sutherland
Proximity Communication and Time. [Citation Graph (0, 0)][DBLP]
ASYNC, 2005, pp:- [Conf] - Jo C. Ebergen, Scott Fairbanks, Ivan E. Sutherland
Predicting Performance of Micropipelines Using Charlie Diagrams. [Citation Graph (0, 0)][DBLP]
ASYNC, 1998, pp:238-246 [Conf] - Jo C. Ebergen, Jonathan Gainsley, Jon K. Lexau, Ivan E. Sutherland
GasP Control for Domino Circuits. [Citation Graph (0, 0)][DBLP]
ASYNC, 2005, pp:12-22 [Conf] - Ivan E. Sutherland, Scott Fairbanks
GasP: A Minimal FIFO Control. [Citation Graph (0, 0)][DBLP]
ASYNC, 2001, pp:46-53 [Conf] - Ivan E. Sutherland, Jon K. Lexau
Designing Fast Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
ASYNC, 2001, pp:184-193 [Conf] - Robert F. Sproull, Ivan E. Sutherland
A Comparison of Codebook Generation Techniques for Vector Quantization. [Citation Graph (0, 0)][DBLP]
Data Compression Conference, 1992, pp:122-131 [Conf] - Robert J. Drost, Craig Forrest, Bruce Guenin, Ron Ho, Ashok V. Krishnamoorthy, Danny Cohen, John E. Cunningham, Bernard Tourancheau, Arthur Zingher, Alex Chow, Gary Lauterbach, Ivan E. Sutherland
Challenges in Building a Flat-Bandwidth Memory Hierarchy for a Large-Scale Computer with Proximity Communication. [Citation Graph (0, 0)][DBLP]
Hot Interconnects, 2005, pp:13-22 [Conf] - Nader Gharachorloo, Satish Gupta, Robert F. Sproull, Ivan E. Sutherland
A characterization of ten rasterization techniques. [Citation Graph (0, 0)][DBLP]
SIGGRAPH, 1989, pp:355-368 [Conf] - T. H. Myer, Ivan E. Sutherland
On the design of display processors. [Citation Graph (0, 0)][DBLP]
Commun. ACM, 1968, v:11, n:6, pp:410-414 [Journal] - Ivan E. Sutherland
A futures market in computer time. [Citation Graph (0, 0)][DBLP]
Commun. ACM, 1968, v:11, n:6, pp:449-451 [Journal] - Ivan E. Sutherland
Micropipelines. [Citation Graph (0, 0)][DBLP]
Commun. ACM, 1989, v:32, n:6, pp:720-738 [Journal] - Ivan E. Sutherland, G. W. Hodgman
Reentrant Polygon Clipping. [Citation Graph (0, 0)][DBLP]
Commun. ACM, 1974, v:17, n:1, pp:32-42 [Journal] - Robert F. Sproull, Ivan E. Sutherland, Charles E. Molnar
The Counterflow Pipeline Processor Architecture. [Citation Graph (0, 0)][DBLP]
IEEE Design & Test of Computers, 1994, v:11, n:3, pp:48-59 [Journal] - Robert F. Sproull, Ivan E. Sutherland, A. Thomson, Satish Gupta, C. Minter
The 8 by 8 Display. [Citation Graph (0, 0)][DBLP]
ACM Trans. Graph., 1983, v:2, n:1, pp:32-56 [Journal]
Twinkle box: a three-dimensional computer input device. [Citation Graph (, )][DBLP]
Search in 0.002secs, Finished in 0.002secs
| NOTICE1 |
|---|
| System may not be available sometimes or not working properly, since it is still in development with continuous upgrades |
| NOTICE2 |
|---|
| The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP |
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002