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Paul Wielage: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Joep L. W. Kessels, Suk-Jin Kim, Ad M. G. Peeters, Paul Wielage
    Clock Synchronization through Handshake Signalling. [Citation Graph (0, 0)][DBLP]
    ASYNC, 2002, pp:59-68 [Conf]
  2. Kees G. W. Goossens, Paul Wielage, Ad M. G. Peeters, Jef L. van Meerbergen
    Networks on Silicon: Combining Best-Effort and Guaranteed Services. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:423-427 [Conf]
  3. Andrei Radulescu, John Dielissen, Kees G. W. Goossens, Edwin Rijpkema, Paul Wielage
    An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:878-883 [Conf]
  4. Edwin Rijpkema, Kees G. W. Goossens, Andrei Radulescu, John Dielissen, Jef L. van Meerbergen, Paul Wielage, E. Waterlander
    Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10350-10355 [Conf]
  5. Paul Wielage, Kees G. W. Goossens
    Networks on Silicon: Blessing or Nightmare? [Citation Graph (0, 0)][DBLP]
    DSD, 2002, pp:196-200 [Conf]
  6. Richard P. Kleihorst, Anteneh A. Abbo, Andre van der Avoird, M. Op de Beeck, Leo Sevat, Paul Wielage, R. van Veen, H. van Herten
    Xetal: a low-power high-performance smart camera processor. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2001, pp:215-218 [Conf]
  7. Andrei Radulescu, John Dielissen, Santiago González Pestana, Om Prakash Gangwal, Edwin Rijpkema, Paul Wielage, Kees G. W. Goossens
    An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:1, pp:4-17 [Journal]
  8. Joep L. W. Kessels, Ad M. G. Peeters, Paul Wielage, Suk-Jin Kim
    Clock synchronization through handshake signalling. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2003, v:27, n:9, pp:447-460 [Journal]
  9. Tobias Dubois, Erik Jan Marinissen, Mohamed Azimane, Paul Wielage, Erik Larsson, Clemens Wouters
    Test quality analysis and improvement for an embedded asynchronous FIFO. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:859-864 [Conf]
  10. Paul Wielage, Erik Jan Marinissen, Michel Altheimer, Clemens Wouters
    Design and DfT of a high-speed area-efficient embedded asynchronous FIFO. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:853-858 [Conf]

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