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Publications of Author

1. Riccardo Mariani, R. Roncella, Roberto Saletti, Pierangelo Terreni
   On the Realisation of Delay-Insensitive Asynchronous Circuits with CMOS Ternary Logic. [Citation Graph (0, 0)][DBLP]
   ASYNC, 1997, pp:54-0 [Conf]
   
2. Pierluigi Nuzzo, Geert Van der Plas, Fernando De Bernardinis, Liesbet Van der Perre, Bert Gyselinckx, Pierangelo Terreni
   A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW. [Citation Graph (0, 0)][DBLP]
   DAC, 2006, pp:873-878 [Conf]
   
3. Sergio Saponara, Pierangelo Terreni
   Mixed-signal design of a digital input power amplifier for automotive audio applications. [Citation Graph (0, 0)][DBLP]
   DATE Designers' Forum, 2006, pp:212-216 [Conf]
   
4. Fernando De Bernardinis, Pierluigi Nuzzo, Pierangelo Terreni, Alberto L. Sangiovanni-Vincentelli
   Enriching an analog platform for analog-to-digital converter design. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2005, pp:1286-1289 [Conf]
   
5. Maurizio Ciampa, Pierangelo Terreni, Mario Poletti
   Conditions for the existence and uniqueness of DC solutions of networks containing nonlinear opamps with ideal model. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1993, pp:2498-2501 [Conf]
   
6. Maurizio Ciampa, Pierangelo Terreni, Mario Poletti
   Linear networks and systems polynomially depending on parameters: Behaviour of the solutions for large and small values. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1993, pp:2682-2685 [Conf]
   
7. Riccardo Mariani, R. Roncella, Roberto Saletti, Pierangelo Terreni
   Useful Application of CMOS Ternary Logic to the Realisation of Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
   ISMVL, 1997, pp:203-208 [Conf]
   
8. Fernando De Bernardinis, Luca Fanucci, T. Ramacciotti, Pierangelo Terreni
   A QoS Internet Protocol Scheduler on the IXP1200 Network Platform. [Citation Graph (0, 0)][DBLP]
   IWSOC, 2003, pp:394-399 [Conf]
   
9. Sergio Saponara, Luca Fanucci, Pierangelo Terreni
   Context-Aware Algorithmic/Architectural Solutions for Real-time Embedded Video Systems. [Citation Graph (0, 0)][DBLP]
   WISES, 2004, pp:79-90 [Conf]
   
10. Luca Fanucci, Massimiliano Forliti, Pierangelo Terreni
    FAST: FFT ASIC automated synthesis. [Citation Graph (0, 0)][DBLP]
    Integration, 2002, v:33, n:1-2, pp:23-37 [Journal]
    
11. Fernando De Bernardinis, R. Roncella, Roberto Saletti, Pierangelo Terreni, Graziano Bertini
    An efficient VLSI architecture for real-time additive synthesis of musical signals. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:1, pp:105-110 [Journal]
    
12. 
    Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems. [Citation Graph (, )][DBLP]