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Priyadarsan Patra:
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Publications of Author
- Priyadarsan Patra, Stanislav Polonsky, Donald S. Fussell
Delay Insensitive Logic for RSFQ Superconductor Technology. [Citation Graph (0, 0)][DBLP] ASYNC, 1997, pp:42-53 [Conf]
- Priyadarsan Patra, Donald S. Fussell
Power-efficient delay-insensitive codes for data transmission. [Citation Graph (0, 0)][DBLP] HICSS (1), 1995, pp:316-323 [Conf]
- Priyadarsan Patra, Donald S. Fussell
Efficient Delay-Insensitive RSFQ Circuits. [Citation Graph (0, 0)][DBLP] ICCD, 1996, pp:413-418 [Conf]
- Kavel M. Büyüksahin, Priyadarsan Patra, Farid N. Najm
ESTIMA: an architectural-level power estimator for multi-ported pipelined register files. [Citation Graph (0, 0)][DBLP] ISLPED, 2003, pp:294-297 [Conf]
- Priyadarsan Patra, Donald S. Fussell
Fully asynchronous, robust, high-throughput arithmetic structures. [Citation Graph (0, 0)][DBLP] VLSI Design, 1995, pp:141-145 [Conf]
Runtime validation of memory ordering using constraint graph checking. [Citation Graph (, )][DBLP]
Runtime Validation of Transactional Memory Systems. [Citation Graph (, )][DBLP]
A PVT aware accurate statistical logic library for high- metal-gate nano-CMOS. [Citation Graph (, )][DBLP]
Impact of Process and Temperature Variations on Network-on-Chip Design Exploration. [Citation Graph (, )][DBLP]
On the cusp of a validation wall. [Citation Graph (, )][DBLP]
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