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Rajesh Pendurkar: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri
    CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. [Citation Graph (0, 0)][DBLP]
    ASYNC, 2000, pp:62-72 [Conf]
  2. Rajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian
    Synthesis of BIST hardware for performance testing of MCM interconnections. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:69-73 [Conf]
  3. Rajesh Pendurkar, Abhijit Chatterjee, Craig A. Tovey
    Optimal single probe traversal algorithm for testing of MCM substrat. [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:396-0 [Conf]
  4. Ishwar Parulkar, Thomas A. Ziaja, Rajesh Pendurkar, Anand D'Souza, Amitava Majumdar
    A Scalable, Low Cost Design-for-Test Architecture for UltraSPARC? Chip Multi-Processors. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:726-735 [Conf]
  5. Rajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian
    A distributed BIST technique for diagnosis of MCM interconnections. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:214-221 [Conf]
  6. Rajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian
    Switching activity generation with automated BIST synthesis forperformance testing of interconnects. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:9, pp:1143-1158 [Journal]
  7. Rajesh Pendurkar, Craig A. Tovey, Abhijit Chatterjee
    Single-probe traversal optimization for testing of MCM substrate interconnections. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:8, pp:1178-1191 [Journal]

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