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Andrew D. Brown: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Mathew A. Sacker, Andrew D. Brown, Peter R. Wilson, Andrew J. Rushton
    A General Purpose Behavioural Asynchronous Synthesis System. [Citation Graph (0, 0)][DBLP]
    ASYNC, 2004, pp:125-134 [Conf]
  2. Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Tom J. Kazmierski, Jerzy Baranowski
    Efficient Mixed-Domain Behavioural Modeling of Ferromagnetic Hysteresis Implemented in VHDL-AMS. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:742-743 [Conf]
  3. Peter R. Wilson, J. Neil Ross, Mark Zwolinski, Andrew D. Brown, Yavuz Kiliç
    Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:1133- [Conf]
  4. Matthew A. Swabey, Stephen P. Beeby, Andrew D. Brown, John E. Chad
    Using Otoacoustic Emissions as a Biometric. [Citation Graph (0, 0)][DBLP]
    ICBA, 2004, pp:600-606 [Conf]
  5. Andrew D. Brown, Mark Zwolinski
    The continuous-discrete interface - What does this really mean? Modelling and simulation issues. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2003, pp:894-897 [Conf]
  6. Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Andrew J. Rushton
    Multiple domain behavioral modeling using VHDL-AMS. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:644-647 [Conf]
  7. Mark Zwolinski, Andrew D. Brown
    Behavioural modelling of analogue faults in VHDL-AMS - a case study. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:632-635 [Conf]
  8. Andrew D. Brown, Geoffrey E. Hinton
    Relative Density Nets: A New Way to Combine Backpropagation with HMM's. [Citation Graph (0, 0)][DBLP]
    NIPS, 2001, pp:1149-1156 [Conf]
  9. Geoffrey E. Hinton, Andrew D. Brown
    Spiking Boltzmann Machines. [Citation Graph (0, 0)][DBLP]
    NIPS, 1999, pp:122-128 [Conf]
  10. Tom J. Kazmierski, Andrew D. Brown, Ken G. Nichols, Mark Zwolinski
    A General Purpose Network Solving System. [Citation Graph (0, 0)][DBLP]
    VLSI, 1991, pp:147-156 [Conf]
  11. Andrew D. Brown, Mark Zwolinski
    Lee router modified for global routing. [Citation Graph (0, 0)][DBLP]
    Computer-Aided Design, 1990, v:22, n:5, pp:296-300 [Journal]
  12. Andrew D. Brown, Mark Zwolinski, Ken G. Nichols, Tom J. Kazmierski
    Confidence in mixed-mode circuit simulation. [Citation Graph (0, 0)][DBLP]
    Computer-Aided Design, 1992, v:24, n:2, pp:115-118 [Journal]
  13. Andrew D. Brown, Howard C. Card
    Cooperative Coevolution of Neural Representations. [Citation Graph (0, 0)][DBLP]
    Int. J. Neural Syst., 2000, v:10, n:4, pp:311-320 [Journal]
  14. Enric T. Claverol, Andrew D. Brown, John E. Chad
    Scalable cortical simulations on Beowulf architectures. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2002, v:43, n:1-4, pp:307-315 [Journal]
  15. Enric T. Claverol, Andrew D. Brown, John E. Chad
    Discrete simulation of large aggregates of neurons. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2002, v:47, n:1-4, pp:277-297 [Journal]
  16. Andrew D. Brown, Howard C. Card
    Cooperative-Competitive Algorithms for Evolutionary Networks Classifying Noisy Digital Images. [Citation Graph (0, 0)][DBLP]
    Neural Processing Letters, 1999, v:10, n:3, pp:223-229 [Journal]
  17. Zaher Baidas, Andrew D. Brown, Alan Christopher Williams
    Floating-point behavioral synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:7, pp:828-839 [Journal]
  18. Andrew D. Brown, Keith R. Baker, Alan Christopher Williams
    On-line testing of statically and dynamically scheduled synthesized systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:1, pp:47-57 [Journal]
  19. Nicola Nicolici, Bashir M. Al-Hashimi, Andrew D. Brown, Alan Christopher Williams
    BIST hardware synthesis for RTL data paths based on testcompatibility classes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:11, pp:1375-1385 [Journal]
  20. Mathew A. Sacker, Andrew D. Brown, Andrew J. Rushton, Peter R. Wilson
    A behavioral synthesis system for asynchronous circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:9, pp:978-994 [Journal]
  21. Stephen B. Furber, Steve Temple, A. Brown
    On-chip and inter-chip networks for modeling large-scale neural systems. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  22. S. S. Modi, P. R. Wilson, A. D. Brown
    Power aware learning for class AB analogue VLSI neural network. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  23. Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors. [Citation Graph (, )][DBLP]


  24. A communication infrastructure for a million processor machine. [Citation Graph (, )][DBLP]


  25. A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits. [Citation Graph (, )][DBLP]


  26. SpiNNaker: The Design Automation Problem. [Citation Graph (, )][DBLP]


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