The SCEAS System
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Yoshiki Saito:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
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Publications of Author
Cache Controller Design on Ultra Low Leakage Embedded Processors. [Citation Graph (, )][DBLP]
Configuration with Self-Configured Datapath: A High Speed Configuration Method for Dynamically Reconfigurable Processors. [Citation Graph (, )][DBLP]
A Real Chip Evaluation of MuCCRA-3: A Low Power Dycamically Reconfigurable Processor Array. [Citation Graph (, )][DBLP]
Power reduction techniques for Dynamically Reconfigurable Processor Arrays. [Citation Graph (, )][DBLP]
Fine Grain Partial Reconfiguration for energy saving in Dynamically Reconfigurable Processors. [Citation Graph (, )][DBLP]
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