|
Search the dblp DataBase
Markus Schwiegershausen:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Carsten Reuter, M. Schwiegershausen, Peter Pirsch
Heterogeneous Multiprocessor Scheduling and Allocation using Evolutionary Algorithms. [Citation Graph (0, 0)][DBLP] ASAP, 1997, pp:294-303 [Conf]
- M. Schönfeld, M. Schwiegershausen, Peter Pirsch
Synthesis of intermediate memories for the data supply to processor arrays. [Citation Graph (0, 0)][DBLP] Algorithms and Parallel VLSI Architectures, 1991, pp:365-370 [Conf]
- Tien-Toan Do, Holger Kropp, M. Schwiegershausen, Peter Pirsch
Implementation of pipelined multipliers on Xilinx FPGAs. [Citation Graph (0, 0)][DBLP] FPL, 1997, pp:51-60 [Conf]
- M. Schwiegershausen, Peter Pirsch
A system level design methodology for the optimization of heterogeneous multiprocessors. [Citation Graph (0, 0)][DBLP] ISSS, 1995, pp:162-169 [Conf]
- M. Schönfeld, M. Schwiegershausen, Peter Pirsch
Synthesis of Intermediate Memories needed for the Data Supply to Processor Arrays. [Citation Graph (0, 0)][DBLP] VLSI, 1991, pp:297-306 [Conf]
A formal approach for the optimization of heterogeneous multiprocessors for complex image processing schemes. [Citation Graph (, )][DBLP]
Search in 0.001secs, Finished in 0.002secs
|