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Publications of Author

1. Saman Adham, Sanjay Gupta
   DP-BIST: A Built-In Self Test For DSP DataPaths A Low Overhead and High Fault Coverage Technique. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 1996, pp:205-212 [Conf]
   
2. Bernard Antaki, Yvon Savaria, Nanhan Xiong, Saman Adham
   Design For Testability Method for CML Digital Circuits. [Citation Graph (0, 0)][DBLP]
   DATE, 1999, pp:360-367 [Conf]
   
3. Dhamin Al-Khalili, Saman Adham, Come Rozon, Moazzem Hossain, D. Racz
   Comprehensive Defect Analysis and Defect Coverage of CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   DFT, 1998, pp:84-92 [Conf]
   
4. Harry Hulvershorn, Paul Soong, Saman Adham
   Linking Diagnostic Software to Hardware Self Test in Telecom Systems. [Citation Graph (0, 0)][DBLP]
   ITC, 1995, pp:986-993 [Conf]
   
5. Benoit Nadeau-Dostie, Harry Hulvershorn, Saman Adham
   A New Hardware Fault Insertion Scheme for System Diagnostics Verification. [Citation Graph (0, 0)][DBLP]
   ITC, 1995, pp:994-1002 [Conf]
   
6. Yuejian Wu, Saman Adham
   BIST Fault Diagnosis in Scan-Based VLSI Environments. [Citation Graph (0, 0)][DBLP]
   ITC, 1996, pp:48-57 [Conf]
   
7. Saman Adham, Benoit Nadeau-Dostie
   A BIST Algorithm for Bit/Group Write Enable Faults in SRAMs. [Citation Graph (0, 0)][DBLP]
   MTDT, 2004, pp:98-101 [Conf]
   
8. José M. Miranda, Scott Davidson, Peter Dziel, Saman Adham, Steve Millman
   Test Reuse at System Level. [Citation Graph (0, 0)][DBLP]
   VTS, 1998, pp:318-319 [Conf]
   
9. Yuejian Wu, Saman Adham
   Scan-based BIST fault diagnosis. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:2, pp:203-211 [Journal]
   
10. 
    Improved Core Isolation and Access for Hierarchical Embedded Test. [Citation Graph (, )][DBLP]