|
Search the dblp DataBase
Fumiyasu Hirose:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Vishwani D. Agrawal, Bernard Courtois, Fumiyasu Hirose, Sandip Kundu, Chung-Len Lee, Yinghua Min, P. Pal Chaudhuri
Panel: New Research Problems in the Emerging Test Technology. [Citation Graph (0, 0)][DBLP] Asian Test Symposium, 1995, pp:189-0 [Conf]
- Fumiyasu Hirose
Performance Evaluation of an Event-Driven Logic Simulation Machine. [Citation Graph (0, 0)][DBLP] DAC, 1992, pp:428-431 [Conf]
- Minoru Saitoh, Kenji Iwata, Akiko Nokamura, Makoto Kakegawa, Junichi Masuda, Hirofumi Hamamura, Fumiyasu Hirose, Nobuaki Kawato
Logic Simulation System Using Simulation Processor (SP). [Citation Graph (0, 0)][DBLP] DAC, 1988, pp:225-230 [Conf]
- Hiroaki Iwashita, Satoshi Kowatari, Tsuneo Nakata, Fumiyasu Hirose
Automatic test program generation for pipelined processors. [Citation Graph (0, 0)][DBLP] ICCAD, 1994, pp:580-583 [Conf]
- Hiroaki Iwashita, Tsuneo Nakata, Fumiyasu Hirose
CTL model checking based on forward state traversal. [Citation Graph (0, 0)][DBLP] ICCAD, 1996, pp:82-87 [Conf]
- Rajeev Murgai, Masahiro Fujita, Fumiyasu Hirose
Logic synthesis for a single large look-up table. [Citation Graph (0, 0)][DBLP] ICCD, 1995, pp:415-0 [Conf]
- Rajeev Murgai, Fumiyasu Hirose, Masahiro Fujita
Speeding Up Look-up-Table Driven Logic Simulation. [Citation Graph (0, 0)][DBLP] VLSI, 1999, pp:385-397 [Conf]
- Fumiyasu Hirose, Koichiro Takayama, Nobuaki Kawato
A Method to Generate Tests for Combinational Logic Circuits Using an Ultra-High-Speed Logic Simulator. [Citation Graph (0, 0)][DBLP] ITC, 1988, pp:102-107 [Conf]
Acceleration of behavioral simulation on simulation specific machines. [Citation Graph (, )][DBLP]
Search in 0.001secs, Finished in 0.002secs
|