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Title:
Author:
Fulvio Corno: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Davide Appello, Fulvio Corno, M. Giovinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    A P1500 Compliant BIST-Based Approach to Embedded RAM Diagnosis. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2001, pp:97-102 [Conf]
  2. Silvia Chiusano, Fulvio Corno, Paolo Prinetto
    A Test Pattern Generation Algorithm Exploiting Behavioral Information. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1998, pp:480-485 [Conf]
  3. Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    Guaranteeing Testability in Re-encoding for Low Power. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:30-35 [Conf]
  4. Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
    Effective Techniques for High-Level ATPG. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2001, pp:225-0 [Conf]
  5. Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
    Evolutionary Test Program Induction for Microprocessor Design Verification. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2002, pp:368-373 [Conf]
  6. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
    A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:56-61 [Conf]
  7. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
    Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:68-73 [Conf]
  8. Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Paolo Prinetto, Matteo Sonza Reorda, Giovanni Squillero
    Simulation-based verification of network protocols performance. [Citation Graph (0, 0)][DBLP]
    CHARME, 1997, pp:236-251 [Conf]
  9. Paolo Camurati, Fulvio Corno, Paolo Prinetto
    A Methodology for System-Level Design for Verifiability. [Citation Graph (0, 0)][DBLP]
    CHARME, 1993, pp:80-91 [Conf]
  10. Paolo Camurati, Fulvio Corno, Paolo Prinetto
    Exploiting Symbolic Traversal Techniques for Efficient Process Algebra Manipulation. [Citation Graph (0, 0)][DBLP]
    CHDL, 1993, pp:31-44 [Conf]
  11. Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Silvano Gai, Paolo Prinetto, Matteo Sonza Reorda
    A New Model for Improving symbolic Product Machine Traversal. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:614-619 [Conf]
  12. Luis Berrojo, I. Gónzólez, Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Luis Entrena, Celia López
    New Techniques for Speeding-Up Fault-Injection Campaigns. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:847-853 [Conf]
  13. Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
    Fully Automatic Test Program Generation for Microprocessor Cores. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11006-11011 [Conf]
  14. Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante
    Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:670-0 [Conf]
  15. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Approximate Equivalence Verification of Sequential Circuits via Genetic Algorithms. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:754-755 [Conf]
  16. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Alberto Manzone, Alessandro Pincetti
    Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:385-389 [Conf]
  17. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
    On the test of microprocessor IP cores. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:209-213 [Conf]
  18. Enrique San Millán, Luis Entrena, José Alberto Espejo, Silvia Chiusano, Fulvio Corno
    Integrating Symbolic Techniques in ATPG-Based Sequential Logic Optimization. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:516-520 [Conf]
  19. Elizabeth M. Rudnick, Roberto Vietti, Akilah Ellis, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:570-576 [Conf]
  20. Fulvio Corno, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante
    Optimal Vector Selection for Low Power BIST. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:219-226 [Conf]
  21. Fulvio Corno, S. Tosato, P. Gabrielli
    System-Level Analysis of Fault Effects in an Automotive Environment. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:529-536 [Conf]
  22. Silvia Chiusano, Fulvio Corno, Matteo Sonza Reorda, Roberto Vietti
    A System for Evaluating On-Line Testability at the RT-level. [Citation Graph (0, 0)][DBLP]
    DFT, 1998, pp:284-291 [Conf]
  23. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Maurizio Damiani, Leonardo Impagliazzo, G. Sartore
    On-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications. [Citation Graph (0, 0)][DBLP]
    EDCC, 1996, pp:190-202 [Conf]
  24. Paolo Camurati, Fulvio Corno, Paolo Prinetto, C. Bayol, B. Soulas
    System-Level Modeling and Verification: a Comprehensive Design Methodology. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:636-640 [Conf]
  25. Fulvio Corno, Giovanni Squillero
    An Enhanced Framework for Microprocessor Test-Program Generation. [Citation Graph (0, 0)][DBLP]
    EuroGP, 2003, pp:307-316 [Conf]
  26. Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
    ARPIA: A High-Level Evolutionary Test Signal Generator. [Citation Graph (0, 0)][DBLP]
    EvoWorkshops, 2001, pp:298-306 [Conf]
  27. Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
    Prediction of Power Requirements for High-Speed Circuits. [Citation Graph (0, 0)][DBLP]
    EvoWorkshops, 2000, pp:247-254 [Conf]
  28. Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
    Test Pattern Generation Under Low Power Constraints. [Citation Graph (0, 0)][DBLP]
    EvoWorkshops, 1999, pp:162-170 [Conf]
  29. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Automatic Validation of Protocol Interfaces Described in VHDL. [Citation Graph (0, 0)][DBLP]
    EvoWorkshops, 2000, pp:205-213 [Conf]
  30. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Evolutionary Techniques for Minimizing Test Signals Application Time. [Citation Graph (0, 0)][DBLP]
    EvoWorkshops, 2002, pp:183-189 [Conf]
  31. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Approximate Equivalence Verification for Protocol Interface Implementation via Genetic Algorithms. [Citation Graph (0, 0)][DBLP]
    EvoWorkshops, 1999, pp:182-192 [Conf]
  32. Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
    ALPS: A Peak Power Estimation Tool for Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1999, pp:350-353 [Conf]
  33. F. Bianchi, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Roberto Ansaloni
    Boolean Function Manipulation on a Parallel System Using BDDs. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1997, pp:916-928 [Conf]
  34. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    A Parallel Genetic Algorithm for Automatic Generation of Test Sequences for Digital Circuits. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1996, pp:454-459 [Conf]
  35. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva
    A PVM tool for automatic test generation on parallel and distributed systems. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1995, pp:39-44 [Conf]
  36. Florin Bota, Fulvio Corno, Laura Farinetti
    Hypervideo: A Parameterized Hotspot Approach. [Citation Graph (0, 0)][DBLP]
    ICWI, 2002, pp:620-623 [Conf]
  37. Dario Bonino, Alessio Bosca, Fulvio Corno
    An Agent Based Autonomic Semantic Platform. [Citation Graph (0, 0)][DBLP]
    ICAC, 2004, pp:189-196 [Conf]
  38. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
    A new Approach for Initialization Sequences Computation for Synchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:381-386 [Conf]
  39. Fulvio Corno, F. Cumani, Giovanni Squillero
    Exploiting Auto-adaptive 7GP for Highly Effective Test Programs Generation. [Citation Graph (0, 0)][DBLP]
    ICES, 2003, pp:262-273 [Conf]
  40. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Evolving Cellular Automata for Self-Testing Hardware. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:31-40 [Conf]
  41. Alessio Bosca, Giuseppe Valetto, Roberta Maglione, Fulvio Corno
    Specifying Web Service Compositions on the Basis of Natural Language Requests. [Citation Graph (0, 0)][DBLP]
    ICSOC, 2005, pp:588-593 [Conf]
  42. Dario Bonino, Fulvio Corno, Laura Farinetti
    DOSE: A Distributed Open Semantic Elaboration Platform. [Citation Graph (0, 0)][DBLP]
    ICTAI, 2003, pp:580-588 [Conf]
  43. Dario Bonino, Fulvio Corno, Laura Farinetti
    Domain Specific Searches Using Conceptual Spectra. [Citation Graph (0, 0)][DBLP]
    ICTAI, 2004, pp:680-687 [Conf]
  44. Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Giovanni Squillero
    GA-Based Performance Analysis of Network Protocols. [Citation Graph (0, 0)][DBLP]
    ICTAI, 1997, pp:118-124 [Conf]
  45. S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    Exploiting Symbolic Techniques within Genetic Algorithms for Power Optimization. [Citation Graph (0, 0)][DBLP]
    ICTAI, 1997, pp:133-0 [Conf]
  46. Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    A Genetic Algorithm for Automatic Generation of Test Logic for Digital Circuits. [Citation Graph (0, 0)][DBLP]
    ICTAI, 1996, pp:10-16 [Conf]
  47. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
    A genetic algorithm-based system for generating test programs for microprocessor IP cores. [Citation Graph (0, 0)][DBLP]
    ICTAI, 2000, pp:195-198 [Conf]
  48. Alessio Bosca, Andrea Ferrato, Fulvio Corno, Ilenia Congiu, Giuseppe Valetto
    Composing Web Services on the Basis of Natural Language Requests. [Citation Graph (0, 0)][DBLP]
    ICWS, 2005, pp:817-818 [Conf]
  49. Fulvio Corno
    E-learning Issues for Advanced Technical Topics. [Citation Graph (0, 0)][DBLP]
    EDUTECH, 2004, pp:201-206 [Conf]
  50. Fulvio Corno, Tina Ebey, Anna Grabowska, Iliana Nikolova, Evgenia Sendova
    Impact of Technology on Learning Paradigms and Teaching Practices. [Citation Graph (0, 0)][DBLP]
    EDUTECH, 2004, pp:199-200 [Conf]
  51. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Exploiting the Selfish Gene Algorithm for Evolving Cellular Automata. [Citation Graph (0, 0)][DBLP]
    IJCNN (6), 2000, pp:577-584 [Conf]
  52. Davide Appello, Alessandra Fudoli, Vincenzo Tancorre, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda
    A BIST-Based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2002, pp:206-210 [Conf]
  53. Luis Berrojo, Isabel González, Luis Entrena, Celia López, Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Analysis of the Equivalences and Dominances of Transient Faults at the RT Level. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2002, pp:193- [Conf]
  54. Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
    Automatic Test Program Generation from RT-Level Microprocessor Descriptions. [Citation Graph (0, 0)][DBLP]
    ISQED, 2002, pp:120-0 [Conf]
  55. Stefano Barbagallo, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    Testing a Switching Memory in a Telcommunication System. [Citation Graph (0, 0)][DBLP]
    ITC, 1995, pp:947-956 [Conf]
  56. Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    Sequential Circuit Diagnosis Based on Formal Verification Techniques. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:187-196 [Conf]
  57. Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    Making the Circular Self-Test Path Technique Effective for Real Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 1994, pp:949-957 [Conf]
  58. Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    Testability Analysis and ATPG on Behavioral RT-Level VHDL. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:753-759 [Conf]
  59. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    Comparing Topological, Symbolic and GA-based ATPGs: An Experimental Approach. [Citation Graph (0, 0)][DBLP]
    ITC, 1996, pp:39-47 [Conf]
  60. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    Partial Scan Flip Flop Selection for Simulation-Based Sequential ATPGs. [Citation Graph (0, 0)][DBLP]
    ITC, 1996, pp:558-564 [Conf]
  61. Fulvio Corno, Matteo Sonza Reorda, S. Tosato, F. Esposito
    Evaluating the Effects of Transient Faults on Vehicle Dynamic Performance in Automotive Systems. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:1332-1339 [Conf]
  62. Davide Appello, Alessandra Fudoli, Vincenzo Tancorre, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda
    A BIST-Based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques. [Citation Graph (0, 0)][DBLP]
    MTDT, 2002, pp:12-16 [Conf]
  63. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    Exploiting Competing Subpopulations for Automatic Generation of Test Sequences for Digital Cicuits. [Citation Graph (0, 0)][DBLP]
    PPSN, 1996, pp:792-800 [Conf]
  64. Dario Bonino, Fulvio Corno, Laura Farinetti, Andrea Ferrato
    Multilingual semantic elaboration in the DOSE platform. [Citation Graph (0, 0)][DBLP]
    SAC, 2004, pp:1642-1646 [Conf]
  65. Dario Bonino, Fulvio Corno, Federico Pescarmona
    Automatic learning of text-to-concept mappings exploiting WordNet-like lexical networks. [Citation Graph (0, 0)][DBLP]
    SAC, 2005, pp:1639-1644 [Conf]
  66. Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
    Automatic Test Program Generation for Pipeline Processors. [Citation Graph (0, 0)][DBLP]
    SAC, 2003, pp:736-740 [Conf]
  67. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    SAARA: a simulated annealing algorithm for test pattern generation for digital circuits. [Citation Graph (0, 0)][DBLP]
    SAC, 1997, pp:228-232 [Conf]
  68. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Evolving effective CA/CSTP: BIST architectures for sequential circuits. [Citation Graph (0, 0)][DBLP]
    SAC, 2001, pp:345-350 [Conf]
  69. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    An evolutionary algorithm for reducing integrated-circuit test application time. [Citation Graph (0, 0)][DBLP]
    SAC, 2002, pp:608-612 [Conf]
  70. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    The selfish gene algorithm: a new evolutionary optimization strategy. [Citation Graph (0, 0)][DBLP]
    SAC, 1998, pp:349-355 [Conf]
  71. Paolo Pellegrino, Dario Bonino, Fulvio Corno
    Domotic house gateway. [Citation Graph (0, 0)][DBLP]
    SAC, 2006, pp:1915-1920 [Conf]
  72. Fulvio Corno, Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante
    A multi-level approach to the dependability analysis of networked systems based on the CAN protocol. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2004, pp:71-75 [Conf]
  73. Alessio Bosca, Dario Bonino, Marco Comerio, Simone Grega, Fulvio Corno
    A reusable 3D visualization component for the semantic web. [Citation Graph (0, 0)][DBLP]
    Web3D, 2007, pp:89-96 [Conf]
  74. Luis Berrojo, Isabel González, Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Luis Entrena, Celia López
    An Industrial Environment for High-Level Fault-Tolerant Structures Insertion and Validation. [Citation Graph (0, 0)][DBLP]
    VTS, 2002, pp:229-236 [Conf]
  75. Stefano Barbagallo, Monica Lobetti Bodoni, Davide Medina, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    Scan insertion criteria for low design impact. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:26-31 [Conf]
  76. Silvia Chiusano, Fulvio Corno, Paolo Prinetto
    RT-level TPG Exploiting High-Level Synthesis Information. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:341-353 [Conf]
  77. Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    Cellular automata for deterministic sequential test pattern generation. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:60-67 [Conf]
  78. Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Matteo Sonza Reorda
    On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:424-429 [Conf]
  79. Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Uwe Gläser, Heinrich Theodor Vierhaus
    Improving topological ATPG with symbolic techniques. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:338-343 [Conf]
  80. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    A Test Pattern Generation Methodology for Low-Power Consumption. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:453-459 [Conf]
  81. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva
    A portable ATPG tool for parallel and distributed systems. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:29-34 [Conf]
  82. Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
    Low Power BIST via Non-Linear Hybrid Cellular Automata. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:29-34 [Conf]
  83. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    High-Level Observability for Effective High-Level ATPG. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:411-416 [Conf]
  84. Dario Bonino, Fulvio Corno, Giovanni Squillero
    A Real-Time Evolutionary Algorithm for Web Prediction. [Citation Graph (0, 0)][DBLP]
    Web Intelligence, 2003, pp:139-145 [Conf]
  85. Florin Bota, Fulvio Corno, Laura Farinetti
    Enhancing Interactivity for Self-Evaluation in XML-based Courseware. [Citation Graph (0, 0)][DBLP]
    WebNet, 2000, pp:50-55 [Conf]
  86. Florin Bota, Laura Farinetti, Fulvio Corno
    Interactive Visit of a Website. [Citation Graph (0, 0)][DBLP]
    WebNet, 2001, pp:93-97 [Conf]
  87. Fulvio Corno, Laura Farinetti, Giovanni Squillero
    An Intelligent User Interface oriented to non-expert users. [Citation Graph (0, 0)][DBLP]
    WebNet, 2000, pp:675-676 [Conf]
  88. Dario Bonino, Fulvio Corno, Giovanni Squillero
    An Evolutionary Approach to Web Request Prediction. [Citation Graph (0, 0)][DBLP]
    WWW (Posters), 2003, pp:- [Conf]
  89. Stefano Barbagallo, Davide Medina, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    Integrating Online and Offline Testing of a Switching Memory. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:1, pp:63-70 [Journal]
  90. Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    Circular Self-Test Path for FSMs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1996, v:13, n:4, pp:50-60 [Journal]
  91. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    RT-Level ITC'99 Benchmarks and First ATPG Results. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2000, v:17, n:3, pp:44-53 [Journal]
  92. Fulvio Corno, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero
    Automatic Test Program Generation: A Case Study. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:102-109 [Journal]
  93. Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
    The General Product Machine: a New Model for Symbolic FSM Traversal. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1998, v:12, n:3, pp:267-289 [Journal]
  94. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Evolutionary Simulation-Based Validation. [Citation Graph (0, 0)][DBLP]
    International Journal on Artificial Intelligence Tools, 2004, v:13, n:4, pp:897-916 [Journal]
  95. Fulvio Corno, Uwe Gläser, Paolo Prinetto, Matteo Sonza Reorda, Heinrich Theodor Vierhaus, Massimo Violante
    SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:2, pp:191-202 [Journal]
  96. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
    GATTO: a genetic algorithm for automatic test pattern generation for large synchronous sequential circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:8, pp:991-1000 [Journal]
  97. Fulvio Corno, Ernesto Sánchez, Giovanni Squillero
    Evolving assembly programs: how games help microprocessor validation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Evolutionary Computation, 2005, v:9, n:6, pp:695-706 [Journal]
  98. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
    Initializability analysis of synchronous sequential circuits. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:2, pp:249-264 [Journal]
  99. Paolo Pellegrino, Fulvio Corno
    An Extensible Platform for Semantic Classification And Retrieval of Multimedia Resources. [Citation Graph (0, 0)][DBLP]
    SWAP, 2006, pp:- [Conf]

  100. Hybrid symbolic-explicit techniques for the graph coloring problem. [Citation Graph (, )][DBLP]


  101. New static compaction techniques of test sequences for sequential circuits. [Citation Graph (, )][DBLP]


  102. Self-Similarity Metric for Index Pruning in Conceptual Vector Space Models. [Citation Graph (, )][DBLP]


  103. Integrated speech and gaze control for realistic desktop environments. [Citation Graph (, )][DBLP]


  104. A process algebra interpretation of a verification oriented overlanguage of VHDL. [Citation Graph (, )][DBLP]


  105. An experimental analysis of the effectiveness of the circular self-test path technique. [Citation Graph (, )][DBLP]


  106. Eye Tracking Impact on Quality-of-Life of ALS Patients. [Citation Graph (, )][DBLP]


  107. DOG: An Ontology-Powered OSGi Domotic Gateway. [Citation Graph (, )][DBLP]


  108. Versatile RDF Representation for Multimedia Semantic Search. [Citation Graph (, )][DBLP]


  109. DogSim: A state chart simulator for Domotic Environments. [Citation Graph (, )][DBLP]


  110. DogOnt - Ontology Modeling for Intelligent Domotic Environments. [Citation Graph (, )][DBLP]


  111. FaSet: A Set Theory Model for Faceted Search. [Citation Graph (, )][DBLP]


  112. Uniform Access to Domotic Environments through Semantics. [Citation Graph (, )][DBLP]


  113. Interoperation Modeling for Intelligent Domotic Environments. [Citation Graph (, )][DBLP]


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