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Giovanni Squillero:
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Publications of Author
- Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
Effective Techniques for High-Level ATPG. [Citation Graph (0, 0)][DBLP] Asian Test Symposium, 2001, pp:225-0 [Conf]
- Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
Evolutionary Test Program Induction for Microprocessor Design Verification. [Citation Graph (0, 0)][DBLP] Asian Test Symposium, 2002, pp:368-373 [Conf]
- Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP] Asian Test Symposium, 1997, pp:56-61 [Conf]
- Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Paolo Prinetto, Matteo Sonza Reorda, Giovanni Squillero
Simulation-based verification of network protocols performance. [Citation Graph (0, 0)][DBLP] CHARME, 1997, pp:236-251 [Conf]
- Paolo Bernardi, Ernesto Sánchez, Massimiliano Schillaci, Giovanni Squillero, Matteo Sonza Reorda
An effective technique for minimizing the cost of processor software-based diagnosis in SoCs. [Citation Graph (0, 0)][DBLP] DATE, 2006, pp:412-417 [Conf]
- Luis Berrojo, I. Gónzólez, Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Luis Entrena, Celia López
New Techniques for Speeding-Up Fault-Injection Campaigns. [Citation Graph (0, 0)][DBLP] DATE, 2002, pp:847-853 [Conf]
- Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
Fully Automatic Test Program Generation for Microprocessor Cores. [Citation Graph (0, 0)][DBLP] DATE, 2003, pp:11006-11011 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
Approximate Equivalence Verification of Sequential Circuits via Genetic Algorithms. [Citation Graph (0, 0)][DBLP] DATE, 1999, pp:754-755 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Alberto Manzone, Alessandro Pincetti
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience. [Citation Graph (0, 0)][DBLP] DATE, 2000, pp:385-389 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
On the test of microprocessor IP cores. [Citation Graph (0, 0)][DBLP] DATE, 2001, pp:209-213 [Conf]
- Lorena Anghel, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Raoul Velazco
Coupling Different Methodologies to Validate Obsolete Microprocessors. [Citation Graph (0, 0)][DBLP] DFT, 2004, pp:250-255 [Conf]
- Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero
On the Transformation of Manufacturing Test Sets into On-Line Test Sets for Microprocessors. [Citation Graph (0, 0)][DBLP] DFT, 2005, pp:494-504 [Conf]
- Fulvio Corno, Giovanni Squillero
An Enhanced Framework for Microprocessor Test-Program Generation. [Citation Graph (0, 0)][DBLP] EuroGP, 2003, pp:307-316 [Conf]
- Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
ARPIA: A High-Level Evolutionary Test Signal Generator. [Citation Graph (0, 0)][DBLP] EvoWorkshops, 2001, pp:298-306 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
Automatic Validation of Protocol Interfaces Described in VHDL. [Citation Graph (0, 0)][DBLP] EvoWorkshops, 2000, pp:205-213 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
Evolutionary Techniques for Minimizing Test Signals Application Time. [Citation Graph (0, 0)][DBLP] EvoWorkshops, 2002, pp:183-189 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
Approximate Equivalence Verification for Protocol Interface Implementation via Genetic Algorithms. [Citation Graph (0, 0)][DBLP] EvoWorkshops, 1999, pp:182-192 [Conf]
- Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero
Automatic Completion and Refinement of Verification Sets for Microprocessor Cores. [Citation Graph (0, 0)][DBLP] EvoWorkshops, 2005, pp:205-214 [Conf]
- Ernesto Sánchez, Giovanni Squillero, Massimo Violante
Exploiting HW Acceleration for Classifying Complex Test Program Generation Problems. [Citation Graph (0, 0)][DBLP] EvoWorkshops, 2004, pp:230-239 [Conf]
- Ernesto Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero, Luca Sterpone, Massimo Violante
New evolutionary techniques for test-program generation for complex microprocessor cores. [Citation Graph (0, 0)][DBLP] GECCO, 2005, pp:2193-2194 [Conf]
- Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
A new Approach for Initialization Sequences Computation for Synchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP] ICCD, 1997, pp:381-386 [Conf]
- Fulvio Corno, F. Cumani, Giovanni Squillero
Exploiting Auto-adaptive 7GP for Highly Effective Test Programs Generation. [Citation Graph (0, 0)][DBLP] ICES, 2003, pp:262-273 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
Evolving Cellular Automata for Self-Testing Hardware. [Citation Graph (0, 0)][DBLP] ICES, 2000, pp:31-40 [Conf]
- Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Giovanni Squillero
GA-Based Performance Analysis of Network Protocols. [Citation Graph (0, 0)][DBLP] ICTAI, 1997, pp:118-124 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
A genetic algorithm-based system for generating test programs for microprocessor IP cores. [Citation Graph (0, 0)][DBLP] ICTAI, 2000, pp:195-198 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
Exploiting the Selfish Gene Algorithm for Evolving Cellular Automata. [Citation Graph (0, 0)][DBLP] IJCNN (6), 2000, pp:577-584 [Conf]
- Luis Berrojo, Isabel González, Luis Entrena, Celia López, Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
Analysis of the Equivalences and Dominances of Transient Faults at the RT Level. [Citation Graph (0, 0)][DBLP] IOLTW, 2002, pp:193- [Conf]
- Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
Automatic Test Program Generation from RT-Level Microprocessor Descriptions. [Citation Graph (0, 0)][DBLP] ISQED, 2002, pp:120-0 [Conf]
- Paolo Bernardi, Ernesto Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero
Diagnosing Faulty Functional Units in Processors by Using Automatically Generated Test Sets. [Citation Graph (0, 0)][DBLP] MTV, 2005, pp:37-41 [Conf]
- W. Lindsay, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero
Automatic Test Programs Generation Driven by Internal Performance Counters. [Citation Graph (0, 0)][DBLP] MTV, 2004, pp:8-13 [Conf]
- Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
Automatic Test Program Generation for Pipeline Processors. [Citation Graph (0, 0)][DBLP] SAC, 2003, pp:736-740 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
Evolving effective CA/CSTP: BIST architectures for sequential circuits. [Citation Graph (0, 0)][DBLP] SAC, 2001, pp:345-350 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
An evolutionary algorithm for reducing integrated-circuit test application time. [Citation Graph (0, 0)][DBLP] SAC, 2002, pp:608-612 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
The selfish gene algorithm: a new evolutionary optimization strategy. [Citation Graph (0, 0)][DBLP] SAC, 1998, pp:349-355 [Conf]
- Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
Automatic generation of test sets for SBST of microprocessor IP cores. [Citation Graph (0, 0)][DBLP] SBCCI, 2005, pp:74-79 [Conf]
- Luis Berrojo, Isabel González, Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Luis Entrena, Celia López
An Industrial Environment for High-Level Fault-Tolerant Structures Insertion and Validation. [Citation Graph (0, 0)][DBLP] VTS, 2002, pp:229-236 [Conf]
- Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
Low Power BIST via Non-Linear Hybrid Cellular Automata. [Citation Graph (0, 0)][DBLP] VTS, 2000, pp:29-34 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
High-Level Observability for Effective High-Level ATPG. [Citation Graph (0, 0)][DBLP] VTS, 2000, pp:411-416 [Conf]
- Dario Bonino, Fulvio Corno, Giovanni Squillero
A Real-Time Evolutionary Algorithm for Web Prediction. [Citation Graph (0, 0)][DBLP] Web Intelligence, 2003, pp:139-145 [Conf]
- Fulvio Corno, Laura Farinetti, Giovanni Squillero
An Intelligent User Interface oriented to non-expert users. [Citation Graph (0, 0)][DBLP] WebNet, 2000, pp:675-676 [Conf]
- Dario Bonino, Fulvio Corno, Giovanni Squillero
An Evolutionary Approach to Web Request Prediction. [Citation Graph (0, 0)][DBLP] WWW (Posters), 2003, pp:- [Conf]
- Ernesto Sánchez, Massimiliano Schillaci, Giovanni Squillero
Evolving Warriors for the Nano Core. [Citation Graph (0, 0)][DBLP] CIG, 2006, pp:272-278 [Conf]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
RT-Level ITC'99 Benchmarks and First ATPG Results. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 2000, v:17, n:3, pp:44-53 [Journal]
- Fulvio Corno, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero
Automatic Test Program Generation: A Case Study. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 2004, v:21, n:2, pp:102-109 [Journal]
- Giovanni Squillero
MicroGP-An Evolutionary Assembly Program Generator. [Citation Graph (0, 0)][DBLP] Genetic Programming and Evolvable Machines, 2005, v:6, n:3, pp:247-263 [Journal]
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
Evolutionary Simulation-Based Validation. [Citation Graph (0, 0)][DBLP] International Journal on Artificial Intelligence Tools, 2004, v:13, n:4, pp:897-916 [Journal]
- Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero
Efficient Techniques for Automatic Verification-Oriented Test Set Optimization. [Citation Graph (0, 0)][DBLP] International Journal of Parallel Programming, 2006, v:34, n:1, pp:93-109 [Journal]
- Fulvio Corno, Ernesto Sánchez, Giovanni Squillero
Evolving assembly programs: how games help microprocessor validation. [Citation Graph (0, 0)][DBLP] IEEE Trans. Evolutionary Computation, 2005, v:9, n:6, pp:695-706 [Journal]
- Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
Initializability analysis of synchronous sequential circuits. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:2, pp:249-264 [Journal]
- Ernesto Sánchez, Massimiliano Schillaci, Giovanni Squillero, Matteo Sonza Reorda
Interactive presentation: An enhanced technique for the automatic generation of effective diagnosis-oriented test programs for processor. [Citation Graph (0, 0)][DBLP] DATE, 2007, pp:1158-1163 [Conf]
- Leticia Maria Veiras Bolzani, Ernesto Sánchez, Massimiliano Schillaci, Giovanni Squillero
Coupling EA and high-level metrics for the automatic generation of test blocks for peripheral cores. [Citation Graph (0, 0)][DBLP] GECCO, 2007, pp:1912-1919 [Conf]
- Leticia Maria Veiras Bolzani, E. Sanchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero
An Automated Methodology for Cogeneration of Test Blocks for Peripheral Cores. [Citation Graph (0, 0)][DBLP] IOLTS, 2007, pp:265-270 [Conf]
An Evolutionary Methodology for Test Generation for Peripheral Cores Via Dynamic FSM Extraction. [Citation Graph (, )][DBLP]
Evolving Individual Behavior in a Multi-agent Traffic Simulator. [Citation Graph (, )][DBLP]
Exploiting Evolution for an Adaptive Drift-Robust Classifier in Chemical Sensing. [Citation Graph (, )][DBLP]
Ea-based test and verification of microprocessors. [Citation Graph (, )][DBLP]
A novel methodology for diversity preservation in evolutionary algorithms. [Citation Graph (, )][DBLP]
Automatic detection of software defects: an industrial experience. [Citation Graph (, )][DBLP]
Towards drift correction in chemical sensors using an evolutionary strategy. [Citation Graph (, )][DBLP]
Automotive Microcontroller End-of-Line Test via Software-Based Methodologies. [Citation Graph (, )][DBLP]
On Automatic Test Block Generation for Peripheral Testing in SoCs via Dynamic FSMs Extraction. [Citation Graph (, )][DBLP]
Design validation of multithreaded architectures using concurrent threads evolution. [Citation Graph (, )][DBLP]
A local analysis of an incremental evolutionary tool for processor diagnosis. [Citation Graph (, )][DBLP]
Co-evolution of test programs and stimuli vectors for testing of embedded peripheral cores. [Citation Graph (, )][DBLP]
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