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Publications of Author

1. Hadi Esmaeilzadeh, Saeed Shamshiri, Pooya Saeedi, Zainalabedin Navabi
   ISC: Reconfigurable Scan-Cell Architecture for Low Power Testing. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2005, pp:236-241 [Conf]
   
2. Saeed Safari, Hadi Esmaeilzadeh, Amir-Hossein Jahangir
   Testability Improvement During High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2003, pp:505- [Conf]
   
3. Saeed Shamshiri, Hadi Esmaeilzadeh, Zainalabedin Navabi
   Test Instruction Set (TIS) for High Level Self-Testing of CPU Cores. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2004, pp:158-163 [Conf]
   
4. Neda Shahidi, Hadi Esmaeilzadeh, Marziye Abdollahi, Caro Lucas
   Memetic Algorithm Based Path Planning for a Mobile Robot. [Citation Graph (0, 0)][DBLP]
   International Conference on Computational Intelligence, 2004, pp:56-59 [Conf]
   
5. Saeed Safari, Hadi Esmaeilzadeh, Amir-Hossein Jahangir
   A novel improvement technique for high-level test synthesis. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2003, pp:609-612 [Conf]
   
6. Saeed Safari, Amir-Hossein Jahangir, Hadi Esmaeilzadeh
   A parameterized graph-based framework for high-level test synthesis. [Citation Graph (0, 0)][DBLP]
   Integration, 2006, v:39, n:4, pp:363-381 [Journal]
   
7. Saeed Shamshiri, Hadi Esmaeilzadeh, Zainalabedin Navabi
   Instruction-level test methodology for CPU core self-testing. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:4, pp:673-689 [Journal]
   
8. Hadi Esmaeilzadeh, A. Moghimi, E. Ebrahimi, Caro Lucas, Zainalabedin Navabi, A. M. Fakhraie
   DCim++: a C++ library for object oriented hardware design and distributed simulation. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2006, pp:- [Conf]
   
9. Hadi Esmaeilzadeh, Pooya Saeedi, Babak Nadjar Araabi, Caro Lucas, Seid Mehdi Fakhraie
   Neural network stream processing core (NnSP) for embedded systems. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2006, pp:- [Conf]