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Fred J. Meyer: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wenyi Feng, Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi
    Fault Detection in a Tristate System Environment. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1998, pp:253-258 [Conf]
  2. Wenyi Feng, Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi
    A BIST TPG Approach for Interconnect Testing With the IEEE 1149.1 STD. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1999, pp:95-100 [Conf]
  3. Wei-Kang Huang, M. Y. Zhang, Fred J. Meyer, Fabrizio Lombardi
    A XOR-Tree Based Technique for Constant Testability of Configurable FPGAs. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:248-253 [Conf]
  4. D. G. Ashen, Fred J. Meyer, Nohpill Park, Fabrizio Lombardi
    Testing of programmable logic devices (PLD) with faulty resources. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:76-84 [Conf]
  5. Xiao-Tao Chen, Wei-Kang Huang, Nohpill Park, Fred J. Meyer, Fabrizio Lombardi
    Novel Approaches for Fault Detection in Two-Dimensional Combinational Arrays. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:161-169 [Conf]
  6. Wenyi Feng, Xiao-Tao Chen, Fred J. Meyer, Fabrizio Lombardi
    Reconfiguration of One-Time Programmable FPGAs with Faulty Logic Resources. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:368-376 [Conf]
  7. Wenyi Feng, Fred J. Meyer, Wei-Kang Huang, Fabrizio Lombardi
    On the Complexity of Sequential Testing in Configurable FPGAs. [Citation Graph (0, 0)][DBLP]
    DFT, 1998, pp:164-0 [Conf]
  8. Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
    Novel Control Pattern Generators for Interconnect Testing with Boundary Scan. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:112-120 [Conf]
  9. T. Feng, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi, Fred J. Meyer
    Reliability Modeling and Assurance of Clockless Wave Pipeline. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:442-450 [Conf]
  10. Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi
    Test Time Reduction in a Manufacturing Environment by Combining BIST and ATE. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:186-194 [Conf]
  11. Wei Liang Huang, Fred J. Meyer, Fabrizio Lombardi
    Multiple fault detection in logic resources of FPGAs. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:186-194 [Conf]
  12. Fred J. Meyer, Fabrizio Lombardi, Jun Zhao
    Good Processor Identification in Two-Dimensional Grids. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:348-356 [Conf]
  13. Avinash Munshi, Fred J. Meyer, Fabrizio Lombardi
    A New Method for Testing EEPLA's. [Citation Graph (0, 0)][DBLP]
    DFT, 1998, pp:146-154 [Conf]
  14. Nohpill Park, Fred J. Meyer, Fabrizio Lombardi
    Quality-Effective Repair of Multichip Module Systems. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:47-55 [Conf]
  15. Zachary D. Patitz, Nohpill Park, Minsu Choi, Fred J. Meyer
    QCA-Based Majority Gate Design under Radius of Effect-Induced Faults. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:217-228 [Conf]
  16. Xiaopeng Wang, Marco Ottavi, Fred J. Meyer, Fabrizio Lombardi
    On The Yield of Compiler-Based eSRAMs. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:11-19 [Conf]
  17. Fengming Zhang, Young-Jun Lee, T. Kane, Luca Schiano, Mariam Momenzadeh, Yong-Bin Kim, Fred J. Meyer, Fabrizio Lombardi, S. Max, Phil Perkinson
    A Digital and Wide Power Bandwidth H-Field Generator for Automatic Test Equipment. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:159-166 [Conf]
  18. Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
    Two-Step Algorithms for Maximal Diagnosis of Wiring Interconnects. [Citation Graph (0, 0)][DBLP]
    FTCS, 1999, pp:130-137 [Conf]
  19. Fred J. Meyer, Xiao-Tao Chen, Wei-Kang Huang, Fabrizio Lombardi
    Using Virtual Links for Reliable Information Retrieval Across Point-to-Point Networks. [Citation Graph (0, 0)][DBLP]
    FTCS, 1997, pp:216-225 [Conf]
  20. Marco Ottavi, Xiaopeng Wang, Fred J. Meyer, Fabrizio Lombardi
    Simulation of reconfigurable memory core yield. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:136-140 [Conf]
  21. Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
    Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping. [Citation Graph (0, 0)][DBLP]
    IPDPS Workshops, 2000, pp:951-958 [Conf]
  22. Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi, Farzin Karimi
    Hybrid Multisite Testing at Manufacturing. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:927-936 [Conf]
  23. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Diagnosing the Interconnect of Bus-Connected Multi-RAM Systems under Restricted and General Fault Models. [Citation Graph (0, 0)][DBLP]
    MTDT, 2000, pp:14-19 [Conf]
  24. Farzin Karimi, Fred J. Meyer, Fabrizio Lombardi
    Random Testing of Multi-Port Static Random Access Memories. [Citation Graph (0, 0)][DBLP]
    MTDT, 2002, pp:101-108 [Conf]
  25. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Interconnect Diagnosis of Bus-Connected Multi-RAM Systems. [Citation Graph (0, 0)][DBLP]
    MTDT, 1999, pp:40-47 [Conf]
  26. Minsu Choi, Nohpill Park, Fred J. Meyer, Fabrizio Lombardi
    Connectivity-Based Multichip Module Repair. [Citation Graph (0, 0)][DBLP]
    PRDC, 2001, pp:19-26 [Conf]
  27. Xiao-Tao Chen, Fred J. Meyer, Fabrizio Lombardi
    On the Fault Coverage of Interconnect Diagnosis. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:101-109 [Conf]
  28. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Fault Detection and Diagnosis of Interconnects of Random Access Memories. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:42-47 [Conf]
  29. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Maximal Diagnosis of Interconnects of Random Access Memories. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:378-383 [Conf]
  30. Xiao-Tao Chen, Wei-Kang Huang, Nohpill Park, Fred J. Meyer, Fabrizio Lombardi
    Design Verification of FPGA Implementations. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:2, pp:66-73 [Journal]
  31. Bruce F. Cockburn, Fabrizio Lombardi, Fred J. Meyer
    Guest Editors' Introduction: DRAM Architecture and Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:19-21 [Journal]
  32. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Analyzing and Diagnosing Interconnect Faults in Bus-Structured Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:1, pp:54-64 [Journal]
  33. Cristiana Bolchini, Fred J. Meyer
    Guest editorial. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2004, v:50, n:5, pp:237-238 [Journal]
  34. Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
    Adaptive Algorithms for Maximal Diagnosis of Wiring Interconnects. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:10, pp:1259-1270 [Journal]
  35. Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi
    An Approach for Detecting Multiple Faulty FPGA Logic Blocks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:1, pp:48-54 [Journal]
  36. Fred J. Meyer, Nohpill Park
    Predicting Defect-Tolerant Yield in the Embedded Core Context. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:11, pp:1470-1479 [Journal]
  37. Fred J. Meyer, Dhiraj K. Pradhan
    Flip-Trees: Fault-Tolerant Graphs with Wide Containers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:4, pp:472-478 [Journal]
  38. Fred J. Meyer, Dhiraj K. Pradhan
    Dynamic Testing Strategy for Distributed Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:356-365 [Journal]
  39. Fred J. Meyer, Dhiraj K. Pradhan
    Modeling Defect Spatial Distribution. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:4, pp:538-546 [Journal]
  40. Tong Liu, Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi
    Testing and testable designs for one-time programmable FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:11, pp:1370-1375 [Journal]
  41. Xiao-Tao Chen, Fred J. Meyer, Fabrizio Lombardi
    Structural diagnosis of interconnects by coloring. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:2, pp:249-271 [Journal]
  42. Fred J. Meyer, Dhiraj K. Pradhan
    Consensus With Dual Failure Modes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1991, v:2, n:2, pp:214-222 [Journal]
  43. Jun Zhao, Fred J. Meyer, Nohpill Park, Fabrizio Lombardi
    Sequential diagnosis of processor array systems. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Reliability, 2004, v:53, n:4, pp:487-498 [Journal]
  44. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi, Nohpill Park
    Maximal diagnosis of interconnects of random access memories. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Reliability, 2003, v:52, n:4, pp:423-434 [Journal]
  45. D. D. Sharma, Fred J. Meyer, Dhiraj K. Pradhan
    Yield optimization of modular and redundant multimegabit RAMs: a study of effectiveness of coding versus static redundancy using the center-satellite model. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:4, pp:546-558 [Journal]
  46. Wei-Kang Huang, Fred J. Meyer, Xiao-Tao Chen, Fabrizio Lombardi
    Testing configurable LUT-based FPGA's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:2, pp:276-283 [Journal]
  47. Tong Liu, Xiao-Tao Chen, Fred J. Meyer, Fabrizio Lombardi
    Test generation and scheduling for layout-based detection of bridge faults in interconnects. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:1, pp:48-55 [Journal]

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