Search the dblp DataBase

Publications of Author

1. Shantanu Gupta, Tarang Vaish, Santanu Chattopadhyay
   Flip-flop chaining architecture for power-efficient scan during test application. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2005, pp:410-413 [Conf]
   
2. Jason A. Blome, Shantanu Gupta, Shuguang Feng, Scott A. Mahlke
   Cost-efficient soft error protection for embedded microprocessors. [Citation Graph (0, 0)][DBLP]
   CASES, 2006, pp:421-431 [Conf]
   
3. 
   Shoestring: probabilistic soft error reliability on the cheap. [Citation Graph (, )][DBLP]
   
   
4. 
   StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems. [Citation Graph (, )][DBLP]
   
   
5. 
   Maestro: Orchestrating Lifetime Reliability in Chip Multiprocessors. [Citation Graph (, )][DBLP]
   
   
6. 
   Using hardware transactional memory for data race detection. [Citation Graph (, )][DBLP]
   
   
7. 
   Architectural core salvaging in a multi-core processor for hard-error tolerance. [Citation Graph (, )][DBLP]
   
   
8. 
   Necromancer: enhancing system throughput by animating dead cores. [Citation Graph (, )][DBLP]
   
   
9. 
   Enabling ultra low voltage system operation by tolerating on-chip cache failures. [Citation Graph (, )][DBLP]
   
   
10. 
    ZerehCache: armoring cache architectures in high defect density technologies. [Citation Graph (, )][DBLP]
    
    
11. 
    Self-calibrating Online Wearout Detection. [Citation Graph (, )][DBLP]
    
    
12. 
    The StageNet fabric for constructing resilient multicore systems. [Citation Graph (, )][DBLP]
    
    
13. 
    RaceTM: detecting data races using transactional memory. [Citation Graph (, )][DBLP]
    
    
14. 
    Open standards and accessibility to information: a critical analysis of OOXML in India. [Citation Graph (, )][DBLP]