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Bozena Kaminska: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Naim Ben Hamida, Khaled Saab, David Marche, Bozena Kaminska
    A perturbation based fault modeling and simulation for mixed-signal circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:182-187 [Conf]
  2. Janusz Rzeszut, Bozena Kaminska, Yvon Savaria
    A new method for testing mixed analog and digital circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1995, pp:127-132 [Conf]
  3. Khaled Saab, Naim Ben Hamida, Bozena Kaminska
    Closing the gap between analog and digital. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:774-779 [Conf]
  4. Khaled Saab, Naim Ben Hamida, Bozena Kaminska
    Parametric Fault Simulation and Test Vector Generation. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:650-0 [Conf]
  5. Abdessatar Abderrahman, Bozena Kaminska, Yvon Savaria
    Estimation of Simultaneous Switching Power and Ground Noise of Static CMOS Combinational Circuits. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:658- [Conf]
  6. Mohamed Jamoussi, Bozena Kaminska
    M-Testability: An Approach for Data-Path Testability Evaluation. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:449-455 [Conf]
  7. Ali Assi, Bozena Kaminska
    Modeling of communication protocols in VHDL. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1995, pp:168-171 [Conf]
  8. Karim Arabi, Bozena Kaminska, Janusz Rzeszut
    A new built-in self-test approach for digital-to-analog and analog-to-digital converters. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:491-494 [Conf]
  9. Bozena Kaminska, Karim Arabi
    Mixed Signal DFT: A Concise Overview. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:672-680 [Conf]
  10. Naim Ben Hamida, Bechir Ayari, Bozena Kaminska
    Testing of embedded A/D converters in mixed-signal circuit. [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:135-136 [Conf]
  11. Karim Arabi, Bozena Kaminska
    Built-In Temperature Sensors for On-line Thermal Monitoring of Microelectronic Structures. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:462-467 [Conf]
  12. Karim Arabi, Bozena Kaminska, Stephen K. Sunter
    Design for testability of integrated operational amplifiers using oscillation-test strategy. [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:40-45 [Conf]
  13. Samir Lejmi, Bozena Kaminska, Edouard Wagneur
    Retiming for the Global Optimization of Synchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 1994, pp:398-403 [Conf]
  14. Said Amellal, Bozena Kaminska
    Scheduling of a Control and Data Flow Graph. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1666-1669 [Conf]
  15. Bechir Ayari, Bozena Kaminska
    BDD-FTEST: Fast, Backtrack-Free Test Generator Based on Binary Decision Diagram Representation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:2132-2135 [Conf]
  16. Samir Boubezari, Bozena Kaminska
    Mixed Deterministic and Pseudorandom Test Vector Generator Based on Cellular Automata Structures. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:1928-1931 [Conf]
  17. Naim Ben Hamida, Bozena Kaminska
    High Level Synthesis with Testability Constraints. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:65-68 [Conf]
  18. Naim Ben Hamida, Bozena Kaminska, Yvon Savaria
    Initiability: A Measure of Sequential Testability. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1619-1622 [Conf]
  19. Naim Ben Hamida, Bozena Kaminska, Yvon Savaria
    Pseudo-Random Vector Compaction for Sequential Testability. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:63-66 [Conf]
  20. Mohamed Jamoussi, Bozena Kaminska
    A Functional-level Testability Evaluation Using a New M-Testability. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1611-1614 [Conf]
  21. Samir Lejmi, Bozena Kaminska, Bechir Ayari
    Retiming for BIST-Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:1740-1743 [Conf]
  22. Samir Lejmi, Bozena Kaminska, Edouard Wagneur
    Resynthesis and Retiming of Synchronous Sequential Cirucits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1674-1677 [Conf]
  23. Mohamed Soufi, Yvon Savaria, Bozena Kaminska
    On Using Partial Reset for Pseudo-Random Testing. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:949-952 [Conf]
  24. Ewa Sokolowska, M. Barszcz, Bozena Kaminska
    TED Thermo Electrical Designer: A New Physical Design Verification Tool. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:164-168 [Conf]
  25. Karim Arabi, Hassan Ihs, Christian Dufaza, Bozena Kaminska
    Digital oscillation-test method for delay and stuck-at fault testing of digital circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:91-100 [Conf]
  26. Karim Arabi, Bozena Kaminska
    Design and Realization of an Accurate Built-In Current Sensor for On-Line Power Dissipation Measurement and IDDQ Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:578-586 [Conf]
  27. Karim Arabi, Bozena Kaminska
    Oscillation Built-In Self Test (OBIST) Scheme for Functional and Structural Testing of Analog and Mixed-Signal Integrated Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:786-795 [Conf]
  28. Mathieu Gagnon, Bozena Kaminska
    Optical Communication Channel Test Using BIST Approaches. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:626-635 [Conf]
  29. Naim Ben Hamida, Bozena Kaminska
    Analog Circuit Testing Based on Sensitivity Computation and New Circuit Modeling. [Citation Graph (0, 0)][DBLP]
    ITC, 1993, pp:652-661 [Conf]
  30. Naim Ben Hamida, Khaled Saab, David Marche, Bozena Kaminska, Guy Quesnel
    LIMSoft: Automated Tool for Design and Test Integration of Analog Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 1996, pp:571-580 [Conf]
  31. Bozena Kaminska
    Homegrown Tools and Equipment versus EDA and ATE Vendors: The Future of Design to Test Product Lines. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:23- [Conf]
  32. Bozena Kaminska
    Is Analog Fault Simulation a Key to Product Quality? Practical Considerations. [Citation Graph (0, 0)][DBLP]
    ITC, 1999, pp:648-648 [Conf]
  33. Bozena Kaminska, Karim Arabi, I. Bell, José L. Huertas, B. Kim, Adoración Rueda, Mani Soma, Prashant Goteti
    Analog and Mixed-Signal Benchmark Circuits-First Release. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:183-190 [Conf]
  34. Bozena Kaminska, Yvon Savaria
    Design-for-Testability Using Test Design Yield and Decision Theory. [Citation Graph (0, 0)][DBLP]
    ITC, 1989, pp:884-892 [Conf]
  35. Samir Lejmi, Bozena Kaminska, Bechir Ayari
    Synthesis and Retiming for the Pseudo-Exhaustive BIST of Synchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 1995, pp:683-692 [Conf]
  36. Yvon Savaria, Bruno Laguë, Bozena Kaminska
    A Pragmatic Approach to the Design of Self-Testing Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 1989, pp:745-754 [Conf]
  37. Mustapha Slamani, Bozena Kaminska, Guy Quesnel
    An Integrated Approach for Analog Ciruit Testing with a Minmum Number of Detected Parameters. [Citation Graph (0, 0)][DBLP]
    ITC, 1994, pp:631-640 [Conf]
  38. Ewa Sokolowska, Bozena Kaminska
    Application of Optoelectronic Techniques to High Speed Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 1994, pp:710-719 [Conf]
  39. David Stannard, Bozena Kaminska
    Detection of Hard Faults in a Combinational Circuit Using Budget Constraints. [Citation Graph (0, 0)][DBLP]
    ITC, 1988, pp:999- [Conf]
  40. Naim Ben Hamida, Bozena Kaminska
    Multiple Fault Testing in Analog Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1994, pp:61-66 [Conf]
  41. Mohamed Jamoussi, Bozena Kaminska
    Data Path Testability Evaluation via Functional Testability Measures. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1994, pp:301-306 [Conf]
  42. Abdessatar Abderrahman, Eduard Cerny, Bozena Kaminska
    CLP-based Multifrequency Test Generation for Analog Circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:158-165 [Conf]
  43. Melvin A. Breuer, Bozena Kaminska, J. McDermid, V. Rayapathi, Donald L. Wheater
    Will 0.1um Digital Circuits Require Mixed-Signal Testing. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:186-187 [Conf]
  44. Karim Arabi, Bozena Kaminska
    Oscillation-test strategy for analog and mixed-signal integrated circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:476-482 [Conf]
  45. Karim Arabi, Bozena Kaminska
    Parametric and Catastrophic Fault Coverage of Analog Circuits in Oscillation-Test Methodology. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:166-171 [Conf]
  46. Mehdi Ehsanian, Bozena Kaminska, Karim Arabi
    A new digital test approach for analog-to-digital converter testing. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:60-65 [Conf]
  47. Khaled Saab, Bozena Kaminska, Bernard Courtois, Marcelo Lubaszewski
    Frequency-based BIST for analog circuit testin. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:54-59 [Conf]
  48. Samir Lejmi, Bozena Kaminska, Bechir Ayari
    Retiming, resynthesis, and partitioning for the pseudo-exhaustive testing of sequential circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:434-439 [Conf]
  49. Bozena Kaminska, Tad A. Kwasniewski, Linda S. Milor, G. Roberts, P. Flahive, Jérôme Wojcik
    Is High Frequency Analog DFT Possible? [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:214-215 [Conf]
  50. Mohamed Soufi, Steve Rochon, Yvon Savaria, Bozena Kaminska
    Design and performance of CMOS TSPC cells for high speed pseudo random testing. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:368-373 [Conf]
  51. Mohamed Soufi, Yvon Savaria, Bozena Kaminska
    On the design of at-speed testable VLSI circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:290-295 [Conf]
  52. Iboun Taimiya Sylla, Mustapha Slamani, Bozena Kaminska, Fartoumi M. Hossein, Patrick Vincent
    Impedance Mismatch and Lumped Capacitance Effects in High Frequency Testing. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:239-244 [Conf]
  53. Karim Arabi, Bozena Kaminska, Janusz Rzeszut
    BIST for D/A and A/D Converters. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1996, v:13, n:4, pp:40-49 [Journal]
  54. Sreejit Chakravarty, Ramalingam Sridhar, Shambhu J. Upadhyaya, Yervant Zorian, Gil Philips, Bozena Kaminska, Bernard Courtois
    Conference Reports. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:4, pp:95-97 [Journal]
  55. Mounir Fares, Bozena Kaminska
    Exploring Test Space with Fuzzy Decision Making. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1994, v:11, n:3, pp:17-27 [Journal]
  56. Bozena Kaminska, Bernard Courtois
    Guest Editors' Introduction: Mixed Analog and Digital Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1996, v:13, n:2, pp:8-9 [Journal]
  57. Gil Philips, Yervant Zorian, Charles W. Rosenthal, Bozena Kaminska
    Conference Reports. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1996, v:13, n:3, pp:8-144 [Journal]
  58. Mustapha Slamani, Bozena Kaminska
    Analog Circuit Fault Diagnosis Based on Sensitivity Computation and Functional Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1992, v:9, n:1, pp:30-39 [Journal]
  59. Mustapha Slamani, Bozena Kaminska
    Multifrequency Analysis of Faults in Analog Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:2, pp:70-80 [Journal]
  60. Samir Boubezari, Bozena Kaminska
    A Deterministic Built-In-Self-Test Generator Based on Cellular Automata Structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1995, v:44, n:6, pp:805-816 [Journal]
  61. Mohamed Soufi, Yvon Savaria, F. Darlay, Bozena Kaminska
    Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1995, v:44, n:10, pp:1251-1256 [Journal]
  62. Abdessatar Abderrahman, Eduard Cerny, Bozena Kaminska
    Worst case tolerance analysis and CLP-based multifrequency test generation for analog circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:3, pp:332-345 [Journal]
  63. Said Amellal, Bozena Kaminska
    Functional synthesis of digital systems with TASS. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:5, pp:537-552 [Journal]
  64. Karim Arabi, Bozena Kaminska
    Testing analog and mixed-signal integrated circuits using oscillation-test method. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:7, pp:745-753 [Journal]
  65. Bechir Ayari, Bozena Kaminska
    A new dynamic test vector compaction for automatic test pattern generation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:3, pp:353-358 [Journal]
  66. Samir Boubezari, Eduard Cerny, Bozena Kaminska, Benoit Nadeau-Dostie
    Testability analysis and test-point insertion in RTL VHDL specifications for scan-based BIST. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:9, pp:1327-1340 [Journal]
  67. Mounir Fares, Bozena Kaminska
    FPAD: a fuzzy nonlinear programming approach to analog circuit design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:7, pp:785-793 [Journal]
  68. Khaled Saab, Naim Ben Hamida, Bozena Kaminska
    Closing the gap between analog and digital testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:2, pp:307-314 [Journal]
  69. Bozena Kaminska, Stephen K. Sunter, Salvador Mir
    Analog and mixed signal test techniques for SOC development. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2005, v:36, n:12, pp:1063- [Journal]
  70. Pawel Gburzynski, Bozena Kaminska, Wladek Olesinski
    A tiny and efficient wireless ad-hoc protocol for low-cost sensor networks. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1557-1562 [Conf]
  71. Jasbir N. Patel, Abdul Haseeb Ma, Takaya Ueda, Bonnie Gray, Ash Parmeswaran, Bozena Kaminska
    A Novel 3-Way Cell Sorter using Power Efficient Electrolysis-Based Actuator. [Citation Graph (0, 0)][DBLP]
    CCECE, 2006, pp:348-351 [Conf]
  72. Karim Arabi, Bozena Kaminska, Mohamad Sawan
    On chip testing data converters using static parameters. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:3, pp:409-419 [Journal]
  73. Hans G. Kerkhoff, Bozena Kaminska
    Analog and mixed signal test techniques for SoCs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:10, pp:887-888 [Journal]

  74. Testing Real-Time Properties of Embedded Systems. [Citation Graph (, )][DBLP]


  75. Efficient and accurate testing of analog-to-digital converters using oscillation-test method. [Citation Graph (, )][DBLP]


  76. High temperature polymer capacitors for aerospace applications. [Citation Graph (, )][DBLP]


  77. Concurrent Detection of Faults Affecting Energy Harvesting Circuits of Self-Powered Wearable Sensors. [Citation Graph (, )][DBLP]


  78. Reliable Data Transmission over Simple Wireless Channels: A Case Study. [Citation Graph (, )][DBLP]


  79. Enhanced Dominant Pruning-based Broadcasting in Untrusted Ad-hoc Wireless Networks. [Citation Graph (, )][DBLP]


  80. Multiparameter Single Locus Integrated Multilayer Polymer Microsensor System. [Citation Graph (, )][DBLP]


  81. Prediction of a key role of motifs binding E2F and NR2F in down-regulation of numerous genes during the development of the mouse hippocampus. [Citation Graph (, )][DBLP]


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