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Publications of Author

1. Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada
   CMOS Open Defect Detection Based on Supply Current in Time-Variable Electric Field and Supply Voltage Application. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2001, pp:117-122 [Conf]
   
2. Masaki Hashizume, Yukiya Miura, Masahiro Ichimiya, Takeomi Tamesada, Kozo Kinoshita
   A High-Speed IDDQ Sensor for Low-Voltage ICs. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 1998, pp:327-0 [Conf]
   
3. Masaki Hashizume, Hiroyuki Yotsuyanagi, Masahiro Ichimiya, Takeomi Tamesada, Masashi Takeda
   High speed IDDQ test and its testability for process variation. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2000, pp:344-349 [Conf]
   
4. Teppei Takeda, Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Yukiya Miura, Kozo Kinoshita
   IDDQ Sensing Technique for High Speed IDDQ Testing. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2001, pp:111-116 [Conf]
   
5. Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada
   CMOS open defect detection by supply current test. [Citation Graph (0, 0)][DBLP]
   DATE, 2001, pp:509- [Conf]
   
6. Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada
   Random Pattern Testability of the Open Defect Detection Method using Application of Time-variable Electric Field. [Citation Graph (0, 0)][DBLP]
   DELTA, 2002, pp:387-391 [Conf]
   
7. Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada
   Test Pattern for Supply Current Test of Open Defects by Applying Time-Variable Electric Field. [Citation Graph (0, 0)][DBLP]
   DFT, 2001, pp:287-0 [Conf]
   
8. Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada
   Electric field for detecting open leads in CMOS logic circuits by supply current testing. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2005, pp:2995-2998 [Conf]
   
9. Masahiro Ichimiya, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
   A test circuit for pin shorts generating oscillation in CMOS logic circuits. [Citation Graph (0, 0)][DBLP]
   Systems and Computers in Japan, 2004, v:35, n:13, pp:10-20 [Journal]