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Ming-Jun Hsiao: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sheng-Hung Hsieh, Ming-Jun Hsiao, Tsin-Yuan Chang
    An Embedded Built-In-Self-Test Approach for Analog-to-Digital Converters. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2002, pp:266-0 [Conf]
  2. Shu-Rong Lee, Ming-Jun Hsiao, Tsin-Yuan Chang
    An Access Timing Measurement Unit of Embedded Memory. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2002, pp:104-0 [Conf]
  3. Yi-Ming Sheng, Ming-Jun Hsiao, Tsin-Yuan Chang
    A Measurement Unit for Input Signal Analysis of SRAM Sense Amplifier. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2004, pp:272-276 [Conf]
  4. Jeng-Horng Tsai, Ming-Jun Hsiao, Tsin-Yuan Chang
    An Embedded Built-in-Self-Test Approach for Digital-to-Analog Converters. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2001, pp:423-0 [Conf]
  5. Ming-Jun Hsiao, Jing-Reng Huang, Shao-Shen Yang, Tsin-Yuan Chang
    A low-cost CMOS time interval measurement core. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:190-193 [Conf]
  6. Ming-Jun Hsiao, Jing-Reng Huang, Shao-Shen Yang, Tsin-Yuan Chang
    A built-in timing parametric measurement unit. [Citation Graph (0, 0)][DBLP]
    ITC, 2001, pp:315-322 [Conf]
  7. Ming-Jun Hsiao, Jing-Reng Huang, Tsin-Yuan Chang
    A Built-In Parametric Timing Measurement Unit. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:4, pp:322-330 [Journal]

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