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Adoración Rueda: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José L. Huertas
    Testing mixed-signal cores: practical oscillation-based test in an analog macrocell. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2000, pp:31-38 [Conf]
  2. Salvador Mir, Adoración Rueda, Thomas Olbrich, Eduardo J. Peralías, José Luis Huertas
    SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:281-286 [Conf]
  3. Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
    Digital Background Gain Error Correction in Pipeline ADCs. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:82-87 [Conf]
  4. Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda, Ralf Seepold, Natividad Martínez Madrid
    A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:310-315 [Conf]
  5. Gildas Leger, Adoración Rueda
    A Digital Test for First-Order [Sigma-Delta] Modulators. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:708-709 [Conf]
  6. Natividad Martínez Madrid, Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda
    Analog/mixed-signal IP modeling for design reuse. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:766-767 [Conf]
  7. Salvador Mir, Adoración Rueda, Diego Vázquez, José Luis Huertas
    Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:810-814 [Conf]
  8. Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas
    A Vhdl-Based Methodology for Design and Verification of Pipeline A/D Converters. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:534-538 [Conf]
  9. Juan A. Prieto, Adoración Rueda, Ian A. Grout, Eduardo J. Peralías, José L. Huertas, Andrew M. D. Richardson
    An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:905-0 [Conf]
  10. Diego Vázquez, Gildas Leger, Gloria Huertas, Adoración Rueda, José L. Huertas
    A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:298-305 [Conf]
  11. Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
    A Sinewave Analyzer for Mixed-Signal BIST Applications in a 0.35µm Technology. [Citation Graph (0, 0)][DBLP]
    DDECS, 2006, pp:119-124 [Conf]
  12. Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
    Practical Oscillation-Based Test in Analog Integrated Filters: Experimental Results. [Citation Graph (0, 0)][DBLP]
    DELTA, 2002, pp:18-24 [Conf]
  13. Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
    Statistical behavioral modeling and characterization of A/D converters. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:562-566 [Conf]
  14. Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
    Full calibration digital techniques for pipeline ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:1976-1979 [Conf]
  15. Juan A. Prieto, José M. Quintana, Adoración Rueda, José L. Huertas
    An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:491-494 [Conf]
  16. Diego Vázquez, Adoración Rueda, José L. Huertas
    A Low-Cost Strategy for Testing Analog Filters. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:123-126 [Conf]
  17. Alberto Yufera, Adoración Rueda, José L. Huertas
    A Study of the Sensitivity of Switched-Current Wave Analog Filters to Mismatching and Clock-Feedthrough Errors. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:317-320 [Conf]
  18. Eduardo J. Peralías, Adoración Rueda, José L. Huertas
    Structural testing of pipelined analog to digital converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:436-439 [Conf]
  19. Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera
    A 1.25 V FGMOS filter using translinear circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:61-64 [Conf]
  20. Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda
    vMOS-based sorters for multiplier implementations. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:338-341 [Conf]
  21. Alberto Yufera, Adoración Rueda
    Programmable low-voltage continuous-time filter for audio applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:200-203 [Conf]
  22. Diego Vázquez, Gloria Huertas, Gildas Leger, Adoración Rueda, José L. Huertas
    Practical solutions for the application of the oscillation-based-test in analog integrated circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:589-592 [Conf]
  23. Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera
    A micropower log domain FGMOS filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:317-320 [Conf]
  24. Esther Rodríguez-Villegas, José M. Quintana, Maria J. Avedillo, Adoración Rueda
    High-speed low-power logic gates using floating gates. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:389-392 [Conf]
  25. Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
    Effective oscillation-based test for application to a DTMF filter bank. [Citation Graph (0, 0)][DBLP]
    ITC, 1999, pp:549-555 [Conf]
  26. Bozena Kaminska, Karim Arabi, I. Bell, José L. Huertas, B. Kim, Adoración Rueda, Mani Soma, Prashant Goteti
    Analog and Mixed-Signal Benchmark Circuits-First Release. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:183-190 [Conf]
  27. Eduardo J. Peralías, Adoración Rueda, Juan A. Prieto, José L. Huertas
    DfT and on-line test of high-performance data converters: a practical case. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:534-0 [Conf]
  28. Raúl Jiménez, Antonio J. Acosta, Eduardo J. Peralías, Adoración Rueda
    An Application of Self-Timed Circuits to the Reduction of Switching Noise in Analog-Digital Circuits. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2000, pp:295-305 [Conf]
  29. Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda
    A Charge Correction Cell for FGMOS-Based Circuits. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:191-0 [Conf]
  30. Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
    Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:317-322 [Conf]
  31. Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
    Built-In Self-Test in Mixed-Signal ICs: A DTMF Macrocell. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:568-571 [Conf]
  32. Eduardo J. Peralías, Gloria Huertas, Adoración Rueda, José L. Huertas
    Self-Testable Pipelined ADC with Low Hardware Overhead. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:272-278 [Conf]
  33. Eduardo J. Peralías, Adoración Rueda, José L. Huertas
    A DFT Technique for Analog-to-Digital Converters with digital correction. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:302-307 [Conf]
  34. Diego Vázquez, Gloria Huertas, Gildas Leger, Adoración Rueda, José L. Huertas
    Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation. [Citation Graph (0, 0)][DBLP]
    VTS, 2002, pp:433-438 [Conf]
  35. Diego Vázquez, José L. Huertas, Adoración Rueda
    Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:42-47 [Conf]
  36. Diego Vázquez, Adoración Rueda, José L. Huertas
    A solution for the on-line test of analog ladder filters. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:48-53 [Conf]
  37. Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
    Practical Oscillation-Based Test of Integrated Filters. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:6, pp:64-72 [Journal]
  38. Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
    Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:6, pp:73-82 [Journal]
  39. Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
    Improved Background Algorithms for Pipeline ADC Full Calibration. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3383-3386 [Conf]
  40. Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
    Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  41. Gildas Leger, Adoración Rueda
    Experimental Validation of a Fully Digital BISTfor Cascaded Sigma Delta Modulators. [Citation Graph (0, 0)][DBLP]
    European Test Symposium, 2006, pp:131-136 [Conf]
  42. Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
    Oscillation-based test in bandpass oversampled A/D converters. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:10, pp:927-936 [Journal]
  43. Adoración Rueda, Michel Renovell, José Luis Huertas
    Guest Editorial. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2005, v:21, n:3, pp:203- [Journal]
  44. Diego Vázquez, Gloria Huertas, África Luque, Manuel J. Barragan Asian, Gildas Leger, Adoración Rueda, José Luis Huertas
    Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2005, v:21, n:3, pp:221-232 [Journal]

  45. A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis. [Citation Graph (, )][DBLP]


  46. Practical Implementation of a Network Analyzer for Analog BIST Applications. [Citation Graph (, )][DBLP]


  47. A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs. [Citation Graph (, )][DBLP]


  48. A CMOS bio-impedance measurement system. [Citation Graph (, )][DBLP]


  49. (Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems. [Citation Graph (, )][DBLP]


  50. Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS. [Citation Graph (, )][DBLP]


  51. A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model. [Citation Graph (, )][DBLP]


  52. Low-cost signature test of RF blocks based on envelope response analysis. [Citation Graph (, )][DBLP]


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