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Masahiro Ishida: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Hirobumi Musha
    Effects of Amplitude Modulation in Jitter Tolerance Measurements of Communication Devices. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2002, pp:45-48 [Conf]
  2. M. Kanzaki, Masahiro Ishida
    Programming for Parallel Pattern Generators. [Citation Graph (0, 0)][DBLP]
    ITC, 1991, pp:1061-1068 [Conf]
  3. Takahiro J. Yamaguchi, Masahiro Ishida, Kiyotaka Ichiyama, Mani Soma, Christian Krawinkel, Katsuaki Ohsawa, Masao Sugai
    A Real-Time Jitter Measurement Board for High-Performance Computer and Communication Systems. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:77-84 [Conf]
  4. Takahiro J. Yamaguchi, Masahiro Ishida, Marco Tilgner, Dong Sam Ha
    An Efficient Method for Compressing Test Data. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:79-88 [Conf]
  5. Takahiro J. Yamaguchi, Mani Soma, David Halter, Jim Nissen, Rajesh Raina, Masahiro Ishida, Toshifumi Watanabe
    Jitter measurements of a PowerPCTM microprocessor using an analytic signal method. [Citation Graph (0, 0)][DBLP]
    ITC, 2000, pp:955-964 [Conf]
  6. Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Makoto Kurosawa, Hirobumi Musha
    Effects of Deterministic Jitter in a Cable on Jitter Tolerance Measurements. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:58-66 [Conf]
  7. Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Hirobumi Musha, Louis Malarsie
    A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:717-725 [Conf]
  8. Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
    Testing clock distribution circuits using an analytic signal method. [Citation Graph (0, 0)][DBLP]
    ITC, 2001, pp:323-331 [Conf]
  9. Masahiro Ishida, Dong Sam Ha, Takahiro J. Yamaguchi
    COMPACT: A Hybrid Method for Compressing Test Data. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:62-69 [Conf]
  10. Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen
    A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:102-110 [Conf]
  11. Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha
    Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency Division. [Citation Graph (0, 0)][DBLP]
    VTS, 2002, pp:207-212 [Conf]
  12. Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Toshifumi Watanabe, Tadahiro Ohmi
    Extraction of Peak-to-Peak and RMS Sinusoidal Jitter Using an Analytic Signal Method. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:395-402 [Conf]
  13. Takahiro J. Yamaguchi, Dong Sam Ha, Masahiro Ishida, Tadahiro Ohmi
    A Method for Compressing Test Data Based on Burrows-Wheeler Transformation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2002, v:51, n:5, pp:486-497 [Journal]
  14. Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
    Skew measurements in clock distribution circuits using an analytic signal method. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:7, pp:997-1009 [Journal]
  15. Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
    An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2798-2801 [Conf]

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