The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Takahiro J. Yamaguchi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Hirobumi Musha
    Effects of Amplitude Modulation in Jitter Tolerance Measurements of Communication Devices. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2002, pp:45-48 [Conf]
  2. Takahiro J. Yamaguchi
    Static Testing of ADCs Using Wavelet Transforms. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:188-193 [Conf]
  3. Kazuyuki Maruo, Masayoshi Ichikawa, Naoto Miyamoto, Leo Karnan, Takahiro J. Yamaguchi, Koji Kotani, Tadahiro Ohmi
    A Dynamically-Reconfigurable Image Recognition Processor. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  4. Takahiro J. Yamaguchi
    Wireless SOC Testing: Can RF Testing Costs Be Reduced? [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:1229- [Conf]
  5. Takahiro J. Yamaguchi
    Open Architecture ATE and 250 Consecutive UIs. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:1307- [Conf]
  6. Takahiro J. Yamaguchi
    Loopback or not? [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:1434- [Conf]
  7. Takahiro J. Yamaguchi, Masahiro Ishida, Kiyotaka Ichiyama, Mani Soma, Christian Krawinkel, Katsuaki Ohsawa, Masao Sugai
    A Real-Time Jitter Measurement Board for High-Performance Computer and Communication Systems. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:77-84 [Conf]
  8. Takahiro J. Yamaguchi, Masahiro Ishida, Marco Tilgner, Dong Sam Ha
    An Efficient Method for Compressing Test Data. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:79-88 [Conf]
  9. Takahiro J. Yamaguchi, Mani Soma
    Dynamic Testing of ADCs Using Wavelet Transforms. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:379-388 [Conf]
  10. Takahiro J. Yamaguchi, Mani Soma, David Halter, Jim Nissen, Rajesh Raina, Masahiro Ishida, Toshifumi Watanabe
    Jitter measurements of a PowerPCTM microprocessor using an analytic signal method. [Citation Graph (0, 0)][DBLP]
    ITC, 2000, pp:955-964 [Conf]
  11. Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Makoto Kurosawa, Hirobumi Musha
    Effects of Deterministic Jitter in a Cable on Jitter Tolerance Measurements. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:58-66 [Conf]
  12. Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Hirobumi Musha, Louis Malarsie
    A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:717-725 [Conf]
  13. Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
    Testing clock distribution circuits using an analytic signal method. [Citation Graph (0, 0)][DBLP]
    ITC, 2001, pp:323-331 [Conf]
  14. Masahiro Ishida, Dong Sam Ha, Takahiro J. Yamaguchi
    COMPACT: A Hybrid Method for Compressing Test Data. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:62-69 [Conf]
  15. Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen
    A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:102-110 [Conf]
  16. Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha
    Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency Division. [Citation Graph (0, 0)][DBLP]
    VTS, 2002, pp:207-212 [Conf]
  17. Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Toshifumi Watanabe, Tadahiro Ohmi
    Extraction of Peak-to-Peak and RMS Sinusoidal Jitter Using an Analytic Signal Method. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:395-402 [Conf]
  18. Takahiro J. Yamaguchi, Dong Sam Ha, Masahiro Ishida, Tadahiro Ohmi
    A Method for Compressing Test Data Based on Burrows-Wheeler Transformation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2002, v:51, n:5, pp:486-497 [Journal]
  19. Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
    Skew measurements in clock distribution circuits using an analytic signal method. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:7, pp:997-1009 [Journal]
  20. Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
    An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2798-2801 [Conf]
  21. Han Bin Kim, Dong Sam Ha, Takeshi Takahashi, Takahiro J. Yamaguchi
    A new approach to built-in self-testable datapath synthesis based on integer linear programming. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:5, pp:594-605 [Journal]

  22. Phase-based alignment of two signals having partially overlapped spectra. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002