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Itsuo Takanami: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Takehiro Ito, Itsuo Takanami
    On fault injection approaches for fault tolerance of feedforward neural networks. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:88-93 [Conf]
  2. Itsuo Takanami
    Built-in Self-Reconfiguring Systems for Mesh-Connected Processor Arrays with Spares on Two Rows/Columns. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:213-221 [Conf]
  3. Itsuo Takanami
    Built-in Self-Reconfiguring Systems for Fault Tolerant Mesh-Connected Processor Arrays by Direct Spare Replacement. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:134-142 [Conf]
  4. Itsuo Takanami, Tadayoshi Horita
    Self-reconstruction of mesh-arrays with 1 1/2 -track switches by digital neural circuits. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:218-226 [Conf]
  5. Tadayoshi Horita, Takurou Murata, Itsuo Takanami
    A Multiple-Weight-and-Neuron-Fault Tolerant Digital Multilayer Neural Network. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:554-562 [Conf]
  6. Katsushi Inoue, Itsuo Takanami
    A Characterization of Recognizable Picture Languages. [Citation Graph (0, 0)][DBLP]
    ICPIA, 1992, pp:133-143 [Conf]
  7. Akira Ito, Katsushi Inoue, Itsuo Takanami
    Constant Leaf-Size Hierarchy of Two-Dimensional Alternating Turing Machines. [Citation Graph (0, 0)][DBLP]
    ICPIA, 1992, pp:144-158 [Conf]
  8. Itsuo Takanami, Masaru Sato, Yun Ping Yang
    A Fault-Value Injection Approach for Multiple-Weight-Fault Tolerance of MNNs. [Citation Graph (0, 0)][DBLP]
    IJCNN (3), 2000, pp:515-520 [Conf]
  9. Katsushi Inoue, Itsuo Takanami
    A Survey of Two-Dimensional Automata Theory. [Citation Graph (0, 0)][DBLP]
    IMYCS, 1988, pp:72-91 [Conf]
  10. Akira Ito, Katsushi Inoue, Itsuo Takanami
    The Simulation of Two-Dimensional One-Marker Automata by Three-Way Turing Machines. [Citation Graph (0, 0)][DBLP]
    IMYCS, 1988, pp:92-101 [Conf]
  11. Tadayoshi Horita, Itsuo Takanami
    A System for Efficiently Self-Reconstructing E-1 1 \over 2 -Track Switch Torus Arrays. [Citation Graph (0, 0)][DBLP]
    ISPAN, 2000, pp:44-49 [Conf]
  12. Tadayoshi Horita, Itsuo Takanami
    A Polynomial Time Algorithm for Reconfiguring the 1 1/2 Track-Switch Model with PE and Bus faults. [Citation Graph (0, 0)][DBLP]
    ISPAN, 1997, pp:16-22 [Conf]
  13. Tadayoshi Horita, Itsuo Takanami
    Fault Tolerant Processor Arrays Based on 1 1/2-Track Switch with Generalized Spare Distributions. [Citation Graph (0, 0)][DBLP]
    ISPAN, 1999, pp:135-137 [Conf]
  14. I. Takanami, T. Horita
    A built-in self-reconfigurable scheme for 3D mesh arrays. [Citation Graph (0, 0)][DBLP]
    ISPAN, 1997, pp:458-464 [Conf]
  15. Tadayoshi Horita, Itsuo Takanami
    A System for Efficiently Self-Reconstructing 1½-Track Switch Torus Arrays. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2000, pp:- [Conf]
  16. Itsuo Takanami, Yasuhiro Oyama
    An Extreme Value Injection Approach with Reduced Learning Time to Make MLNs Multiple-Weight-Fault Tolerant. [Citation Graph (0, 0)][DBLP]
    PRDC, 2002, pp:301-310 [Conf]
  17. Tadayoshi Horita, Itsuo Takanami
    Analytical Results for Reconfiguration of E-11/2- Track Switch Torus Arrays with Multiple Fault Types. [Citation Graph (0, 0)][DBLP]
    PRDC, 2001, pp:233-240 [Conf]
  18. Katsushi Inoue, Itsuo Takanami, Hiroshi Taniguchi
    Two-Dimensional Alternating Turing Machines [Citation Graph (0, 0)][DBLP]
    STOC, 1982, pp:37-46 [Conf]
  19. Katsushi Inoue, Itsuo Takanami, Akira Nakamura
    Connected pictures are not recognizable by deterministic two-dimensional on-line tessellation acceptors. [Citation Graph (0, 0)][DBLP]
    Computer Vision, Graphics, and Image Processing, 1983, v:22, n:2, pp:310-311 [Journal]
  20. Katsushi Inoue, Itsuo Takanami, Akira Nakamura
    Connected pictures are not recognizable by deterministic two-dimensional on-line tessellation acceptors. [Citation Graph (0, 0)][DBLP]
    Computer Vision, Graphics, and Image Processing, 1984, v:26, n:1, pp:126-129 [Journal]
  21. Akira Ito, Katsushi Inoue, Itsuo Takanami, Hiroshi Taniguchi
    Two-Dimensional Alternating Turing Machines with Only Universal States [Citation Graph (0, 0)][DBLP]
    Information and Control, 1982, v:55, n:1-3, pp:193-221 [Journal]
  22. Juraj Hromkovic, Katsushi Inoue, Branislav Rovan, Anna Slobodová, Itsuo Takanami, Klaus W. Wagner
    On the Power of One-Way Synchronized Alternating Machines with Small Space. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 1992, v:3, n:1, pp:65-79 [Journal]
  23. Katsushi Inoue, Akira Ito, Itsuo Takanami
    Alternating Turing Machines with Modified Accepting Structure. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 1991, v:2, n:4, pp:401-417 [Journal]
  24. Katsushi Inoue, Itsuo Sakuramoto, Makoto Sakamoto, Itsuo Takanami
    Two Topics Concerning Two-Dimensional Automata Operating in Parallel. [Citation Graph (0, 0)][DBLP]
    IJPRAI, 1992, v:6, n:2&3, pp:211-225 [Journal]
  25. Katsushi Inoue, Itsuo Takanami
    A Characterization of Recognizable Picture Languages. [Citation Graph (0, 0)][DBLP]
    IJPRAI, 1994, v:8, n:2, pp:501-508 [Journal]
  26. Akira Ito, Katsushi Inoue, Itsuo Takanami, Yasuyoshi Inagaki
    Constant Leaf-Size Hierarchy of Two-Dimensional Alternating Turing Machines. [Citation Graph (0, 0)][DBLP]
    IJPRAI, 1994, v:8, n:2, pp:509-524 [Journal]
  27. Akira Ito, Katsushi Inoue, Itsuo Takanami, Yue Wang
    The Effect of Inkdots for Two-Dimensional Automata. [Citation Graph (0, 0)][DBLP]
    IJPRAI, 1995, v:9, n:5, pp:777-796 [Journal]
  28. Yue Wang, Katsushi Inoue, Itsuo Takanami
    Cooperating Systems of Three-Way, Two-Dimensional Finite Automata. [Citation Graph (0, 0)][DBLP]
    IJPRAI, 1995, v:9, n:5, pp:797-811 [Journal]
  29. Katsushi Inoue, Akira Ito, Itsuo Takanami
    A Relationship Between Nondeterministic Turing Machines and 1-Inkdot Turing Machines with Small Space. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1992, v:43, n:4, pp:225-227 [Journal]
  30. Katsushi Inoue, Akira Ito, Itsuo Takanami, Tsunehiro Yoshinaga
    A Note on Multi-Inkdot Nondeterministic Turing Machines with Small Space. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1993, v:48, n:6, pp:285-288 [Journal]
  31. Katsushi Inoue, Itsuo Takanami
    A Note on Cyclic Closure Operations. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1979, v:8, n:1, pp:15-16 [Journal]
  32. Katsushi Inoue, Itsuo Takanami
    A Note on Bottom-Up Pyramid Acceptors. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1979, v:8, n:1, pp:34-37 [Journal]
  33. Katsushi Inoue, Itsuo Takanami
    A Note on Decision Problems for Three-Way Two-Dimensional Finite Automata. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1980, v:10, n:4/5, pp:245-248 [Journal]
  34. Katsushi Inoue, Itsuo Takanami
    Some Considerations About NPRIORITY(1) Without ROM. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1988, v:28, n:4, pp:215-219 [Journal]
  35. Katsushi Inoue, Itsuo Takanami, Akira Nakamura
    A Note on Two-Dimensional Finite Automata. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1978, v:7, n:1, pp:49-52 [Journal]
  36. Katsushi Inoue, Itsuo Takanami, Hiroshi Taniguchi
    A Note on Alternating On-Line Turing Machines. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1982, v:15, n:4, pp:164-168 [Journal]
  37. Katsushi Inoue, Akira Ito, Itsuo Takanami, Hiroshi Taniguchi
    A space-hierarchy result on two-dimensional alternating Turing machines with only universal states. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1985, v:35, n:1, pp:79-90 [Journal]
  38. Katsushi Inoue, Itsuo Takanami
    A note on closure properties of the classes of sets accepted by tape-bounded two-dimensional turing machines. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1978, v:15, n:2, pp:143-158 [Journal]
  39. Katsushi Inoue, Itsuo Takanami
    Cyclic closure properties of automata on a two-dimensional tape. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1978, v:15, n:3, pp:229-242 [Journal]
  40. Katsushi Inoue, Itsuo Takanami
    Three-way two-dimensional multicounter automata. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1979, v:19, n:1, pp:1-20 [Journal]
  41. Katsushi Inoue, Itsuo Takanami
    Closure properties of three-way and four-way tape-bounded two-dimensional turing machines. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1979, v:18, n:3, pp:247-265 [Journal]
  42. Katsushi Inoue, Itsuo Takanami
    Three-way tape-bounded two-dimensional turing machines. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1979, v:17, n:3, pp:195-220 [Journal]
  43. Katsushi Inoue, Itsuo Takanami
    Three-way tape-bounded two-dimensional turing machines. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1979, v:17, n:3, pp:195-220 [Journal]
  44. Katsushi Inoue, Itsuo Takanami
    On-line n-bounded multicounter automata. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1979, v:17, n:3, pp:239-251 [Journal]
  45. Katsushi Inoue, Itsuo Takanami
    A note on deterministic three-way tape-bounded two-dimensional Turing machines. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1980, v:20, n:1, pp:41-55 [Journal]
  46. Katsushi Inoue, Itsuo Takanami
    A survey of two-dimensional automata theory. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1991, v:55, n:1-3, pp:99-121 [Journal]
  47. Katsushi Inoue, Itsuo Takanami, Akira Nakamura
    A note on time-bounded bottom-up pyramid cellular acceptors. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1990, v:51, n:2, pp:121-133 [Journal]
  48. Katsushi Inoue, Itsuo Takanami, Hiroshi Taniguchi
    Two-dimensional automata with rotated inputs. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1980, v:21, n:3, pp:221-240 [Journal]
  49. Katsushi Inoue, Itsuo Takanami, Hiroshi Taniguchi
    A note on rebound automata. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1982, v:26, n:1, pp:87-93 [Journal]
  50. Katsushi Inoue, Itsuo Takanami, Hiroshi Taniguchi
    Two-dimensional automata with rotated inputs (projection-type). [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1983, v:30, n:1, pp:11-36 [Journal]
  51. Katsushi Inoue, Itsuo Takanami, Roland Vollmar
    Three-way two-dimensional finite automata with rotated inputs. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1986, v:38, n:3, pp:271-282 [Journal]
  52. Akira Ito, Katsushi Inoue, Itsuo Takanami
    A note on three-way two-dimensional alternating Turing machines. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1988, v:45, n:1, pp:1-22 [Journal]
  53. Makoto Sakamoto, Akira Ito, Katsushi Inoue, Itsuo Takanami
    Simulation of Three-Dimensional One-Marker Automata by Five-Way Turing Machines. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1994, v:77, n:1-2, pp:77-99 [Journal]
  54. Makoto Sakamoto, Katsushi Inoue, Itsuo Takanami
    A note on three-dimensional alternating Turing machines with space smaller than log m. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1993, v:72, n:3, pp:225-249 [Journal]
  55. Hiroshi Taniguchi, Katsushi Inoue, Itsuo Takanami
    A note on three-dimensional finite automata. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1982, v:26, n:1, pp:65-85 [Journal]
  56. Juraj Hromkovic, Katsushi Inoue, Itsuo Takanami
    Lower Bounds for Language Recognition on Two-Dimensional Alternating Multihead Machines. [Citation Graph (0, 0)][DBLP]
    J. Comput. Syst. Sci., 1989, v:38, n:3, pp:431-451 [Journal]
  57. Takao Asano, Michiro Shibui, Itsuo Takanami
    General Results on Tour Lengths in Machines and Digraphs. [Citation Graph (0, 0)][DBLP]
    SIAM J. Comput., 1976, v:5, n:4, pp:629-645 [Journal]
  58. Tadayoshi Horita, Itsuo Takanami
    Fault-Tolerant Processor Arrays Based on the 1½-Track Switches with Flexible Spare Distributions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:6, pp:542-552 [Journal]
  59. Katsushi Inoue, Akira Ito, Itsuo Takanami
    A Note on Real-Time One-Way Alternating Multicounter Machines. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1991, v:88, n:2, pp:287-296 [Journal]
  60. Katsushi Inoue, Akira Ito, Itsuo Takanami
    On 1-inkdot Alternating Turing Machines with Small Space. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1994, v:127, n:1, pp:171-179 [Journal]
  61. Katsushi Inoue, Itsuo Takanami, Juraj Hromkovic
    A Leaf-Size Hierarchy of Two-Dimensional Alternating Turing Machines. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1989, v:67, n:1, pp:99-110 [Journal]
  62. Katsushi Inoue, Itsuo Takanami, Akira Nakamura, Tadashi Ae
    One-Way Simple Multihead Finite Automata. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1979, v:9, n:, pp:311-328 [Journal]
  63. Katsushi Inoue, Itsuo Takanami, Hiroshi Taniguchi
    A Relationship between Two-Dimensional Finite Automata and Three-Way Tape-Bounded Two-Dimensional Turing Machines. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1983, v:24, n:, pp:331-336 [Journal]
  64. Katsushi Inoue, Itsuo Takanami, Hiroshi Taniguchi
    Two-Dimensional Alternating Turing Machines. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1983, v:27, n:, pp:61-83 [Journal]
  65. Katsushi Inoue, Itsuo Takanami, Roland Vollmar
    Alternating On-Line Turing Machines with Only Universal States and Small Space Bounds. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1985, v:41, n:, pp:331-339 [Journal]
  66. Akira Ito, Katsushi Inoue, Itsuo Takanami
    Deterministic Two-Dimensional On-Line Tessellation Acceptors are Equivalent to Two-Way Two-Dimensional Alternating Finite Automata Through 180°-Rotation. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1989, v:66, n:3, pp:273-287 [Journal]
  67. Akira Ito, Katsushi Inoue, Itsuo Takanami, Yue Wang
    Optimal Simulation of Two-Dimensional Alternating Finite Automata by Three-Way Nondeterministic Turing Machines. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1995, v:143, n:1, pp:123-135 [Journal]
  68. Hiroshi Matsuno, Katsushi Inoue, Hiroshi Taniguchi, Itsuo Takanami
    Alternating Simple Multihead Finite Automata. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1985, v:36, n:, pp:291-308 [Journal]
  69. Manabu Toda, Katsushi Inoue, Itsuo Takanami
    Two-Dimensional Pattern Matching by Two-Dimensional on-Line Tessellation Acceptors. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1983, v:24, n:, pp:179-194 [Journal]

  70. An Implementation of a Fault-Tolerant 2D Systolic Array on FPGAs and Its Evaluation. [Citation Graph (, )][DBLP]


  71. Novel Value Injection Learning Methods Which Make Multilayer Neural Networks Multiple-Weight-and-Neuron-Fault Tolerant. [Citation Graph (, )][DBLP]


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