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Xrysovalantis Kavousianos: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos
    A ROMless LFSR Reseeding Scheme for Scan-based BIST. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2002, pp:206-0 [Conf]
  2. Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos
    Efficient test-data compression for IP cores using multilevel Huffman coding. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:1033-1038 [Conf]
  3. Xrysovalantis Kavousianos, Dimitris Bakalis, Haridimos T. Vergos, Dimitris Nikolos, George Alexiou
    Low Power Dissipation in BIST Schemes for Modified Booth Multipliers. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:121-129 [Conf]
  4. Xrysovalantis Kavousianos, Dimitris Nikolos, G. Sidiropoulos
    Design of Compact and High speed, Totally Self Checking CMOS Checkers for m-out-of-n Codes. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:128-136 [Conf]
  5. Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos
    A highly regular multi-phase reseeding technique for scan-based BIST. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2003, pp:295-298 [Conf]
  6. Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos
    A novel reseeding technique for accumulator-based test pattern generation. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2001, pp:7-12 [Conf]
  7. Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos
    A New Reseeding Technique for LFSR-Based Test Pattern Generation. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2001, pp:80-86 [Conf]
  8. Stanislaw J. Piestrak, Dimitris Bakalis, Xrysovalantis Kavousianos
    On the Design of Self-Testing Checkers for Modified Berger Codes. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2001, pp:153-157 [Conf]
  9. Giorgos Dimitrakopoulos, Xrysovalantis Kavousianos, Dimitris Nikolos
    Virtual-scan: a novel approach for software-based self-testing of microprocessors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:237-240 [Conf]
  10. Dimitris Bakalis, Dimitris Nikolos, Haridimos T. Vergos, Xrysovalantis Kavousianos
    On Accumulator-Based Bit-Serial Test Response Compaction Schemes. [Citation Graph (0, 0)][DBLP]
    ISQED, 2001, pp:350-0 [Conf]
  11. Maciej Bellos, Dimitris Bakalis, Dimitris Nikolos, Xrysovalantis Kavousianos
    Low Power Testing by Test Vector Ordering with Vector Repetition. [Citation Graph (0, 0)][DBLP]
    ISQED, 2004, pp:205-210 [Conf]
  12. Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos
    An Efficient Seeds Selection Method for LFSR-Based Test-per-Clock BIST. [Citation Graph (0, 0)][DBLP]
    ISQED, 2002, pp:261-266 [Conf]
  13. Emmanouil Kalligeros, D. Kaseridis, Xrysovalantis Kavousianos, Dimitris Nikolos
    Reseeding-Based Test Set Embedding with Reduced Test Sequences. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:226-231 [Conf]
  14. Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos
    Efficient Multiphase Test Set Embedding for Scan-based Testing. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:433-438 [Conf]
  15. Xrysovalantis Kavousianos, Dimitris Bakalis, Maciej Bellos, Dimitris Nikolos
    An Efficient Test Vector Ordering Method for Low Power Testing. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:285-288 [Conf]
  16. Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos
    Test response compaction by an accumulator behaving as a multiple input non-linear feedback shift register. [Citation Graph (0, 0)][DBLP]
    ITC, 2000, pp:804-811 [Conf]
  17. Maciej Bellos, Xrysovalantis Kavousianos, Dimitris Nikolos, Dimitri Kagaris
    DV-TSE: Difference Vector Based Test Set Embedding. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:343-0 [Conf]
  18. Xrysovalantis Kavousianos, Dimitris Nikolos
    Self-exercising self testing k-order comparators. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:216-221 [Conf]
  19. Xrysovalantis Kavousianos, Dimitris Nikolos
    Novel Single and Double Output TSC Berger Code Checkers. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:348-353 [Conf]
  20. Xrysovalantis Kavousianos, Dimitris Nikolos
    Modular TSC Checkers for Bose-Lin and Bose Codes. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:354-360 [Conf]
  21. Xrysovalantis Kavousianos, Dimitris Nikolos, G. Foukarakis, T. Gnardellis
    New efficient totally self-checking Berger code checkers. [Citation Graph (0, 0)][DBLP]
    Integration, 1999, v:28, n:1, pp:101-118 [Journal]
  22. Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos, Spyros Tragoudas
    A new built-in TPG method for circuits with random patternresistant faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:7, pp:859-866 [Journal]
  23. Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos
    Multiphase BIST: a new reseeding technique for high test-data compression. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:10, pp:1429-1446 [Journal]
  24. Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos
    Optimal Selective Huffman Coding for Test-Data Compression. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:8, pp:1146-1152 [Journal]

  25. State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores. [Citation Graph (, )][DBLP]


  26. LFSR-based test-data compression with self-stoppable seeds. [Citation Graph (, )][DBLP]


  27. Generation of compact test sets with high defect coverage. [Citation Graph (, )][DBLP]


  28. Defect aware X-filling for low-power scan testing. [Citation Graph (, )][DBLP]


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